Commit 5827aa3d authored by Ye Li's avatar Ye Li
Browse files

MLK-14391-1 mx6sxarm2: Add mx6sx 14x14/17x17/19x19 arm2 board codes



Copy the board codes and build configurations for i.MX6SX 14x14/17x17/19x19
ARM2 boards from v2016.03 as the base for converting to OF_CONTROL and
DM driver.
Signed-off-by: default avatarYe Li <ye.li@nxp.com>
parent df142b56
......@@ -250,6 +250,30 @@ config TARGET_MX6SXSABREAUTO
select DM_THERMAL
select BOARD_EARLY_INIT_F
config TARGET_MX6SX_14X14_ARM2
bool "mx6sx_14x14_arm2"
select MX6SX
select DM
select DM_THERMAL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_MX6SX_17X17_ARM2
bool "mx6sx_17x17_arm2"
select MX6SX
select DM
select DM_THERMAL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_MX6SX_19X19_ARM2
bool "mx6sx_19x19_arm2"
select MX6SX
select DM
select DM_THERMAL
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
config TARGET_MX6UL_9X9_EVK
bool "mx6ul_9x9_evk"
select BOARD_LATE_INIT
......@@ -434,6 +458,8 @@ source "board/freescale/mx6sll_arm2/Kconfig"
source "board/freescale/mx6sllevk/Kconfig"
source "board/freescale/mx6sxsabresd/Kconfig"
source "board/freescale/mx6sxsabreauto/Kconfig"
source "board/freescale/mx6sx_17x17_arm2/Kconfig"
source "board/freescale/mx6sx_19x19_arm2/Kconfig"
source "board/freescale/mx6ul_14x14_evk/Kconfig"
source "board/freescale/mx6ul_14x14_ddr3_arm2/Kconfig"
source "board/freescale/mx6ul_14x14_lpddr2_arm2/Kconfig"
......
if TARGET_MX6SX_17X17_ARM2 || TARGET_MX6SX_14X14_ARM2
config SYS_BOARD
default "mx6sx_17x17_arm2"
config SYS_VENDOR
default "freescale"
config SYS_CONFIG_NAME
default "mx6sx_17x17_arm2"
config LPDDR2
bool "Select for the board using LPDDR2 not default DDR3"
endif
# (C) Copyright 2014 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := mx6sx_17x17_arm2.o
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sx_17x17_arm2/plugin.bin 0x00907000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x020c4068 0xffffffff
DATA 4 0x020c406c 0xffffffff
DATA 4 0x020c4070 0xffffffff
DATA 4 0x020c4074 0xffffffff
DATA 4 0x020c4078 0xffffffff
DATA 4 0x020c407c 0xffffffff
DATA 4 0x020c4080 0xffffffff
DATA 4 0x020c4084 0xffffffff
DATA 4 0x020e0618 0x000c0000
DATA 4 0x020e05fc 0x00000000
DATA 4 0x020e032c 0x00000030
DATA 4 0x020e0300 0x00000030
DATA 4 0x020e02fc 0x00000030
DATA 4 0x020e05f4 0x00000030
DATA 4 0x020e0340 0x00000030
DATA 4 0x020e0320 0x00000000
DATA 4 0x020e0310 0x00000030
DATA 4 0x020e0314 0x00000030
DATA 4 0x020e0614 0x00000030
DATA 4 0x020e05f8 0x00020000
DATA 4 0x020e0330 0x00000030
DATA 4 0x020e0334 0x00000030
DATA 4 0x020e0338 0x00000030
DATA 4 0x020e033c 0x00000030
DATA 4 0x020e0608 0x00020000
DATA 4 0x020e060c 0x00000030
DATA 4 0x020e0610 0x00000030
DATA 4 0x020e061c 0x00000030
DATA 4 0x020e0620 0x00000030
DATA 4 0x020e02ec 0x00000030
DATA 4 0x020e02f0 0x00000030
DATA 4 0x020e02f4 0x00000030
DATA 4 0x020e02f8 0x00000030
DATA 4 0x021b0800 0xa1390003
DATA 4 0x021b080c 0x00270025
DATA 4 0x021b0810 0x001B001E
DATA 4 0x021b083c 0x4144013C
DATA 4 0x021b0840 0x01300128
DATA 4 0x021b0848 0x4044464A
DATA 4 0x021b0850 0x3A383C34
DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333
DATA 4 0x021b08b8 0x00000800
DATA 4 0x021b0004 0x0002002d
DATA 4 0x021b0008 0x00333030
DATA 4 0x021b000c 0x676b52f3
DATA 4 0x021b0010 0xb66d8b63
DATA 4 0x021b0014 0x01ff00db
DATA 4 0x021b0018 0x00011740
DATA 4 0x021b001c 0x00008000
DATA 4 0x021b002c 0x000026d2
DATA 4 0x021b0030 0x006b1023
DATA 4 0x021b0040 0x0000005f
DATA 4 0x021b0000 0x84190000
DATA 4 0x021b001c 0x04008032
DATA 4 0x021b001c 0x00008033
DATA 4 0x021b001c 0x00068031
DATA 4 0x021b001c 0x05208030
DATA 4 0x021b001c 0x04008040
DATA 4 0x021b0020 0x00000800
DATA 4 0x021b0818 0x00011117
DATA 4 0x021b001c 0x00000000
#endif
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x020c4068 0xffffffff
DATA 4 0x020c406c 0xffffffff
DATA 4 0x020c4070 0xffffffff
DATA 4 0x020c4074 0xffffffff
DATA 4 0x020c4078 0xffffffff
DATA 4 0x020c407c 0xffffffff
DATA 4 0x020c4080 0xffffffff
DATA 4 0x020c4084 0xffffffff
DATA 4 0x020e0618 0x000c0000
DATA 4 0x020e05fc 0x00000000
DATA 4 0x020e032c 0x00000030
DATA 4 0x020e0300 0x00000030
DATA 4 0x020e02fc 0x00000030
DATA 4 0x020e05f4 0x00000030
DATA 4 0x020e0340 0x00000030
DATA 4 0x020e0320 0x00000000
DATA 4 0x020e0310 0x00000030
DATA 4 0x020e0314 0x00000030
DATA 4 0x020e0614 0x00000030
DATA 4 0x020e05f8 0x00020000
DATA 4 0x020e0330 0x00000030
DATA 4 0x020e0334 0x00000030
DATA 4 0x020e0338 0x00000030
DATA 4 0x020e033c 0x00000030
DATA 4 0x020e0608 0x00020000
DATA 4 0x020e060c 0x00000030
DATA 4 0x020e0610 0x00000030
DATA 4 0x020e061c 0x00000030
DATA 4 0x020e0620 0x00000030
DATA 4 0x020e02ec 0x00000030
DATA 4 0x020e02f0 0x00000030
DATA 4 0x020e02f4 0x00000030
DATA 4 0x020e02f8 0x00000030
DATA 4 0x021b0800 0xa1390003
DATA 4 0x021b080c 0x002E003C
DATA 4 0x021b0810 0x001A003F
DATA 4 0x021b083c 0x41480150
DATA 4 0x021b0840 0x012C0150
DATA 4 0x021b0848 0x40404646
DATA 4 0x021b0850 0x38363C32
DATA 4 0x021b08c0 0x2492244A
DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333
DATA 4 0x021b08b8 0x00000800
DATA 4 0x021b0004 0x0002002d
DATA 4 0x021b0008 0x00333030
DATA 4 0x021b000c 0x676b52f3
DATA 4 0x021b0010 0xb66d8b63
DATA 4 0x021b0014 0x01ff00db
DATA 4 0x021b0018 0x00011740
DATA 4 0x021b001c 0x00008000
DATA 4 0x021b002c 0x000026d2
DATA 4 0x021b0030 0x006b1023
DATA 4 0x021b0040 0x0000005f
DATA 4 0x021b0000 0x84190000
DATA 4 0x021b001c 0x04008032
DATA 4 0x021b001c 0x00008033
DATA 4 0x021b001c 0x00068031
DATA 4 0x021b001c 0x05208030
DATA 4 0x021b001c 0x04008040
DATA 4 0x021b0020 0x00000800
DATA 4 0x021b0818 0x00022227
DATA 4 0x021b0004 0x0002556d
DATA 4 0x021b0404 0x00011006
DATA 4 0x021b001c 0x00000000
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
#ifdef CONFIG_SYS_BOOT_QSPI
BOOT_FROM qspi
#elif defined(CONFIG_SYS_BOOT_EIMNOR)
BOOT_FROM nor
#else
BOOT_FROM sd
#endif
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sx_17x17_arm2/plugin.bin 0x00907000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x020c4068 0xffffffff
DATA 4 0x020c406c 0xffffffff
DATA 4 0x020c4070 0xffffffff
DATA 4 0x020c4074 0xffffffff
DATA 4 0x020c4078 0xffffffff
DATA 4 0x020c407c 0xffffffff
DATA 4 0x020c4080 0xffffffff
DATA 4 0x020c4084 0xffffffff
DATA 4 0x020c4018 0x00260324
DATA 4 0x020e0618 0x00080000
DATA 4 0x020e05fc 0x00000000
DATA 4 0x020e032c 0x00000030
DATA 4 0x020e0300 0x00000028
DATA 4 0x020e02fc 0x00000028
DATA 4 0x020e05f4 0x00000028
DATA 4 0x020e0340 0x00000028
DATA 4 0x020e0320 0x00000000
DATA 4 0x020e0310 0x00000000
DATA 4 0x020e0314 0x00000000
DATA 4 0x020e0614 0x00000028
DATA 4 0x020e05f8 0x00020000
DATA 4 0x020e0330 0x00003028
DATA 4 0x020e0334 0x00003028
DATA 4 0x020e0338 0x00003028
DATA 4 0x020e033c 0x00003028
DATA 4 0x020e0608 0x00020000
DATA 4 0x020e060c 0x00000028
DATA 4 0x020e0610 0x00000028
DATA 4 0x020e061c 0x00000028
DATA 4 0x020e0620 0x00000028
DATA 4 0x020e02ec 0x00000028
DATA 4 0x020e02f0 0x00000028
DATA 4 0x020e02f4 0x00000028
DATA 4 0x020e02f8 0x00000028
DATA 4 0x021b001c 0x00008000
DATA 4 0x021b085c 0x1b4700c7
DATA 4 0x021b0800 0xa1390003
DATA 4 0x021b0890 0x00380000
DATA 4 0x021b08b8 0x00000800
DATA 4 0x021b081c 0x33333333
DATA 4 0x021b0820 0x33333333
DATA 4 0x021b0824 0x33333333
DATA 4 0x021b0828 0x33333333
DATA 4 0x021b082c 0x51111111
DATA 4 0x021b0830 0x51111111
DATA 4 0x021b0834 0x51111111
DATA 4 0x021b0838 0x51111111
DATA 4 0x021b0848 0x42424244
DATA 4 0x021b0850 0x2E30322E
DATA 4 0x021b08c0 0x2492244A
DATA 4 0x021b083c 0x20000000
DATA 4 0x021b0840 0x0
DATA 4 0x021b08b8 0x00000800
DATA 4 0x021b000c 0x33374133
DATA 4 0x021b0004 0x00020024
DATA 4 0x021b0010 0x00100A42
DATA 4 0x021b0014 0x00000093
DATA 4 0x021b0018 0x00001748
DATA 4 0x021b002c 0x0f9f26d2
DATA 4 0x021b0030 0x0000020e
DATA 4 0x021b0038 0x00190778
DATA 4 0x021b0008 0x00000000
DATA 4 0x021b0040 0x0000004f
DATA 4 0x021b0000 0xc3110000
DATA 4 0x021b001c 0x00008010
DATA 4 0x021b001c 0x003f8030
DATA 4 0x021b001c 0xff0a8030
DATA 4 0x021b001c 0x82018030
DATA 4 0x021b001c 0x04028030
DATA 4 0x021b001c 0x01038030
DATA 4 0x021b001c 0x00008018
DATA 4 0x021b001c 0x003f8038
DATA 4 0x021b001c 0xff0a8038
DATA 4 0x021b001c 0x82018038
DATA 4 0x021b001c 0x04028038
DATA 4 0x021b001c 0x01038038
DATA 4 0x021b0020 0x00001800
DATA 4 0x021b0818 0x00000000
DATA 4 0x021b0800 0xa1310003
DATA 4 0x021b0004 0x00025576
DATA 4 0x021b0404 0x00011006
DATA 4 0x021b001c 0x00000000
#endif
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/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
/* DDR script */
.macro imx6sx_17x17_ddr3_evk_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x000c0000
str r1, [r0, #0x618]
ldr r1, =0x00000000
str r1, [r0, #0x5fc]
ldr r1, =0x00000030
str r1, [r0, #0x32c]
ldr r1, =0x00000030
str r1, [r0, #0x300]
str r1, [r0, #0x2fc]
str r1, [r0, #0x5f4]
str r1, [r0, #0x340]
ldr r1, =0x00000000
str r1, [r0, #0x320]
ldr r1, =0x00000030
str r1, [r0, #0x310]
str r1, [r0, #0x314]
str r1, [r0, #0x614]
ldr r1, =0x00020000
str r1, [r0, #0x5f8]
ldr r1, =0x00000030
str r1, [r0, #0x330]
str r1, [r0, #0x334]
str r1, [r0, #0x338]
str r1, [r0, #0x33c]
ldr r1, =0x00020000
str r1, [r0, #0x608]
ldr r1, =0x00000030
str r1, [r0, #0x60c]
str r1, [r0, #0x610]
str r1, [r0, #0x61c]
str r1, [r0, #0x620]
str r1, [r0, #0x2ec]
str r1, [r0, #0x2f0]
str r1, [r0, #0x2f4]
str r1, [r0, #0x2f8]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r2, =0xa1390003
str r2, [r0, #0x800]
ldr r2, =0x00270025
str r2, [r0, #0x80c]
ldr r2, =0x001B001E
str r2, [r0, #0x810]
ldr r2, =0x4144013C
str r2, [r0, #0x83c]
ldr r2, =0x01300128
str r2, [r0, #0x840]
ldr r2, =0x4044464A
str r2, [r0, #0x848]
ldr r2, =0x3A383C34
str r2, [r0, #0x850]
ldr r2, =0x33333333
str r2, [r0, #0x81c]
str r2, [r0, #0x820]
str r2, [r0, #0x824]
str r2, [r0, #0x828]
ldr r2, =0x00000800
str r2, [r0, #0x8b8]
ldr r2, =0x0002002d
str r2, [r0, #0x004]
ldr r2, =0x00333030
str r2, [r0, #0x008]
ldr r2, =0x676b52f3
str r2, [r0, #0x00c]
ldr r2, =0xb66d8b63
str r2, [r0, #0x010]
ldr r2, =0x01ff00db
str r2, [r0, #0x014]
ldr r2, =0x00011740
str r2, [r0, #0x018]
ldr r2, =0x00008000
str r2, [r0, #0x01c]
ldr r2, =0x000026d2
str r2, [r0, #0x02c]
ldr r2, =0x006b1023
str r2, [r0, #0x030]
ldr r2, =0x0000005f
str r2, [r0, #0x040]
ldr r2, =0x84190000
str r2, [r0, #0x000]
ldr r2, =0x04008032
str r2, [r0, #0x01c]
ldr r2, =0x00008033
str r2, [r0, #0x01c]
ldr r2, =0x00068031
str r2, [r0, #0x01c]
ldr r2, =0x05208030
str r2, [r0, #0x01c]
ldr r2, =0x04008040
str r2, [r0, #0x01c]
ldr r2, =0x00000800
str r2, [r0, #0x020]
ldr r2, =0x00011117
str r2, [r0, #0x818]
ldr r2, =0x00000000
str r2, [r0, #0x01c]
.endm
.macro imx6_clock_gating
ldr r0, =CCM_BASE_ADDR
ldr r1, =0xffffffff
str r1, [r0, #0x068]
str r1, [r0, #0x06c]
str r1, [r0, #0x070]
str r1, [r0, #0x074]
str r1, [r0, #0x078]
str r1, [r0, #0x07c]
str r1, [r0, #0x080]
str r1, [r0, #0x084]
.endm
.macro imx6_qos_setting
.endm
.macro imx6sx_14x14_lpddr2_arm2_ddr_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x00080000
str r1, [r0, #0x618]
ldr r1, =0x00000000
str r1, [r0, #0x5fc]
ldr r1, =0x00000030
str r1, [r0, #0x32c]
ldr r1, =0x00000028
str r1, [r0, #0x300]
str r1, [r0, #0x2fc]
str r1, [r0, #0x5f4]
str r1, [r0, #0x340]
ldr r1, =0x00000000
str r1, [r0, #0x320]
str r1, [r0, #0x310]
str r1, [r0, #0x314]
ldr r1, =0x00000028
str r1, [r0, #0x614]
ldr r1, =0x00020000
str r1, [r0, #0x5f8]