imx8m: Add Purism Librem5 devkit board
This commit creates a new board for the Purism Librem5 devkit. - The board code was copied from the emcraft/imx8m_som board, minus the parts which were not relevant (other DDR configs). - The Emcraft-specific preprocessor defines have been removed. - A new librem5.h configuration file was created.
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board/purism/common
0 → 120000
board/purism/librem5/Kconfig
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| /* | ||
| * Copyright 2016 Freescale Semiconductor, Inc. | ||
| * Copyright 2017 NXP | ||
| * Copyright 2017 EmCraft Systems | ||
| * | ||
| * SPDX-License-Identifier: GPL-2.0+ | ||
| */ | ||
| #include <common.h> | ||
| #include <malloc.h> | ||
| #include <errno.h> | ||
| #include <asm/io.h> | ||
| #include <miiphy.h> | ||
| #include <netdev.h> | ||
| #include <asm/imx-common/iomux-v3.h> | ||
| #include <asm-generic/gpio.h> | ||
| #include <fsl_esdhc.h> | ||
| #include <mmc.h> | ||
| #include <asm/arch/imx8mq_pins.h> | ||
| #include <asm/arch/sys_proto.h> | ||
| #include <asm/imx-common/gpio.h> | ||
| #include <asm/imx-common/mxc_i2c.h> | ||
| #include <asm/arch/clock.h> | ||
| #include <spl.h> | ||
| #include <power/pmic.h> | ||
| #include <usb.h> | ||
| #include <dwc3-uboot.h> | ||
| #include <linux/usb/ch9.h> | ||
| DECLARE_GLOBAL_DATA_PTR; | ||
| #define QSPI_PAD_CTRL (PAD_CTL_DSE2 | PAD_CTL_HYS) | ||
| #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) | ||
| #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE) | ||
| static iomux_v3_cfg_t const wdog_pads[] = { | ||
| IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), | ||
| }; | ||
| #ifdef CONFIG_FSL_QSPI | ||
| static iomux_v3_cfg_t const qspi_pads[] = { | ||
| IMX8MQ_PAD_NAND_ALE__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL), | ||
| IMX8MQ_PAD_NAND_CE0_B__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL), | ||
| IMX8MQ_PAD_NAND_DATA00__QSPI_A_DATA0 | MUX_PAD_CTRL(QSPI_PAD_CTRL), | ||
| IMX8MQ_PAD_NAND_DATA01__QSPI_A_DATA1 | MUX_PAD_CTRL(QSPI_PAD_CTRL), | ||
| IMX8MQ_PAD_NAND_DATA02__QSPI_A_DATA2 | MUX_PAD_CTRL(QSPI_PAD_CTRL), | ||
| IMX8MQ_PAD_NAND_DATA03__QSPI_A_DATA3 | MUX_PAD_CTRL(QSPI_PAD_CTRL), | ||
| }; | ||
| int board_qspi_init(void) | ||
| { | ||
| imx_iomux_v3_setup_multiple_pads(qspi_pads, ARRAY_SIZE(qspi_pads)); | ||
| set_clk_qspi(); | ||
| return 0; | ||
| } | ||
| #endif | ||
| static iomux_v3_cfg_t const uart_pads[] = { | ||
| #if defined(CONFIG_MXC_UART_BASE) | ||
| IMX8MQ_PAD_UART1_RXD__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL), | ||
| IMX8MQ_PAD_UART1_TXD__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL), | ||
| #if (CONFIG_MXC_UART_BASE == UART3_BASE_ADDR) | ||
| IMX8MQ_PAD_UART3_RXD__UART3_RX | MUX_PAD_CTRL(UART_PAD_CTRL), | ||
| IMX8MQ_PAD_UART3_TXD__UART3_TX | MUX_PAD_CTRL(UART_PAD_CTRL), | ||
| #endif | ||
| #endif | ||
| }; | ||
| int board_early_init_f(void) | ||
| { | ||
| imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); | ||
| return 0; | ||
| } | ||
| #ifdef CONFIG_BOARD_POSTCLK_INIT | ||
| int board_postclk_init(void) | ||
| { | ||
| /* TODO */ | ||
| return 0; | ||
| } | ||
| #endif | ||
| int dram_init(void) | ||
| { | ||
| gd->ram_size = PHYS_SDRAM_SIZE; | ||
| return 0; | ||
| } | ||
| #ifdef CONFIG_OF_BOARD_SETUP | ||
| int ft_board_setup(void *blob, bd_t *bd) | ||
| { | ||
| return 0; | ||
| } | ||
| #endif | ||
| #ifdef CONFIG_FEC_MXC | ||
| #define FEC_RST_PAD IMX_GPIO_NR(1, 9) | ||
| static iomux_v3_cfg_t const fec1_rst_pads[] = { | ||
| IMX8MQ_PAD_GPIO1_IO09__GPIO1_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL), | ||
| IMX8MQ_PAD_GPIO1_IO15__CCM_CLKO2 | MUX_PAD_CTRL(0x1F), | ||
| }; | ||
| static void setup_iomux_fec(void) | ||
| { | ||
| imx_iomux_v3_setup_multiple_pads(fec1_rst_pads, ARRAY_SIZE(fec1_rst_pads)); | ||
| gpio_request(FEC_RST_PAD, "fec1_rst"); | ||
| gpio_direction_output(FEC_RST_PAD, 0); | ||
| udelay(500); | ||
| gpio_direction_output(FEC_RST_PAD, 1); | ||
| } | ||
| static int setup_fec(void) | ||
| { | ||
| setup_iomux_fec(); | ||
| /* Use 125M anatop REF_CLK1 for ENET1, not from external */ | ||
| clrsetbits_le32(IOMUXC_GPR1, | ||
| BIT(13) | BIT(17), 0); | ||
| return set_clk_enet(ENET_125MHz); | ||
| } | ||
| int board_phy_config(struct phy_device *phydev) | ||
| { | ||
| /* enable rgmii rxc skew and phy mode select to RGMII copper */ | ||
| phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f); | ||
| phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8); | ||
| phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); | ||
| phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100); | ||
| if (phydev->drv->config) | ||
| phydev->drv->config(phydev); | ||
| return 0; | ||
| } | ||
| #endif | ||
| #ifdef CONFIG_USB_DWC3 | ||
| #define USB_PHY_CTRL0 0xF0040 | ||
| #define USB_PHY_CTRL0_REF_SSP_EN BIT(2) | ||
| #define USB_PHY_CTRL1 0xF0044 | ||
| #define USB_PHY_CTRL1_RESET BIT(0) | ||
| #define USB_PHY_CTRL1_COMMONONN BIT(1) | ||
| #define USB_PHY_CTRL1_ATERESET BIT(3) | ||
| #define USB_PHY_CTRL1_VDATSRCENB0 BIT(19) | ||
| #define USB_PHY_CTRL1_VDATDETENB0 BIT(20) | ||
| #define USB_PHY_CTRL2 0xF0048 | ||
| #define USB_PHY_CTRL2_TXENABLEN0 BIT(8) | ||
| static struct dwc3_device dwc3_device_data = { | ||
| .maximum_speed = USB_SPEED_SUPER, | ||
| .base = USB1_BASE_ADDR, | ||
| .dr_mode = USB_DR_MODE_PERIPHERAL, | ||
| .index = 0, | ||
| .power_down_scale = 2, | ||
| }; | ||
| static void dwc3_nxp_usb_phy_init(struct dwc3_device *dwc3) | ||
| { | ||
| u32 RegData; | ||
| RegData = readl(dwc3->base + USB_PHY_CTRL1); | ||
| RegData &= ~(USB_PHY_CTRL1_VDATSRCENB0 | USB_PHY_CTRL1_VDATDETENB0 | | ||
| USB_PHY_CTRL1_COMMONONN); | ||
| RegData |= USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET; | ||
| writel(RegData, dwc3->base + USB_PHY_CTRL1); | ||
| RegData = readl(dwc3->base + USB_PHY_CTRL0); | ||
| RegData |= USB_PHY_CTRL0_REF_SSP_EN; | ||
| writel(RegData, dwc3->base + USB_PHY_CTRL0); | ||
| RegData = readl(dwc3->base + USB_PHY_CTRL2); | ||
| RegData |= USB_PHY_CTRL2_TXENABLEN0; | ||
| writel(RegData, dwc3->base + USB_PHY_CTRL2); | ||
| RegData = readl(dwc3->base + USB_PHY_CTRL1); | ||
| RegData &= ~(USB_PHY_CTRL1_RESET | USB_PHY_CTRL1_ATERESET); | ||
| writel(RegData, dwc3->base + USB_PHY_CTRL1); | ||
| } | ||
| #endif | ||
| int usb_gadget_handle_interrupts(void) | ||
| { | ||
| dwc3_uboot_handle_interrupt(0); | ||
| return 0; | ||
| } | ||
| #ifdef CONFIG_USB_TCPC | ||
| struct tcpc_port port; | ||
| struct tcpc_port_config port_config = { | ||
| .i2c_bus = 0, | ||
| .addr = 0x50, | ||
| .port_type = TYPEC_PORT_UFP, | ||
| .max_snk_mv = 20000, | ||
| .max_snk_ma = 3000, | ||
| .max_snk_mw = 15000, | ||
| .op_snk_mv = 9000, | ||
| }; | ||
| #define USB_TYPEC_SEL IMX_GPIO_NR(3, 15) | ||
| static iomux_v3_cfg_t ss_mux_gpio[] = { | ||
| IMX8MQ_PAD_NAND_RE_B__GPIO3_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), | ||
| }; | ||
| void ss_mux_select(enum typec_cc_polarity pol) | ||
| { | ||
| if (pol == TYPEC_POLARITY_CC1) | ||
| gpio_direction_output(USB_TYPEC_SEL, 1); | ||
| else | ||
| gpio_direction_output(USB_TYPEC_SEL, 0); | ||
| } | ||
| static int setup_typec(void) | ||
| { | ||
| int ret; | ||
| imx_iomux_v3_setup_multiple_pads(ss_mux_gpio, ARRAY_SIZE(ss_mux_gpio)); | ||
| gpio_request(USB_TYPEC_SEL, "typec_sel"); | ||
| ret = tcpc_init(&port, port_config, &ss_mux_select); | ||
| if (ret) { | ||
| printf("%s: tcpc init failed, err=%d\n", | ||
| __func__, ret); | ||
| } | ||
| return ret; | ||
| } | ||
| #endif | ||
| #if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_IMX8M) | ||
| int board_usb_init(int index, enum usb_init_type init) | ||
| { | ||
| int ret = 0; | ||
| imx8m_usb_power(index, true); | ||
| if (index == 0 && init == USB_INIT_DEVICE) { | ||
| #ifdef CONFIG_USB_TCPC | ||
| ret = tcpc_setup_ufp_mode(&port); | ||
| #endif | ||
| dwc3_nxp_usb_phy_init(&dwc3_device_data); | ||
| return dwc3_uboot_init(&dwc3_device_data); | ||
| } else if (index == 0 && init == USB_INIT_HOST) { | ||
| #ifdef CONFIG_USB_TCPC | ||
| ret = tcpc_setup_dfp_mode(&port); | ||
| #endif | ||
| return ret; | ||
| } | ||
| return 0; | ||
| } | ||
| int board_usb_cleanup(int index, enum usb_init_type init) | ||
| { | ||
| int ret = 0; | ||
| if (index == 0 && init == USB_INIT_DEVICE) { | ||
| dwc3_uboot_exit(index); | ||
| } else if (index == 0 && init == USB_INIT_HOST) { | ||
| #ifdef CONFIG_USB_TCPC | ||
| ret = tcpc_disable_src_vbus(&port); | ||
| #endif | ||
| } | ||
| imx8m_usb_power(index, false); | ||
| </ |