Commit c461e51d authored by Silvano di Ninno's avatar Silvano di Ninno
Browse files

MLK-18502: board:imx8mm_evk enable tzasc



Enable TZASC on i.MX 8mm.
There is a need on 8MM to enable
the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors.
Signed-off-by: default avatarSilvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
(cherry picked from commit d72b8baecd8495cfba990b999fe390937859ad75)
parent d2f2357a
...@@ -135,6 +135,9 @@ void enable_tzc380(void) ...@@ -135,6 +135,9 @@ void enable_tzc380(void)
/* Enable TZASC and lock setting */ /* Enable TZASC and lock setting */
val = readl(IOMUXC_GPR10); val = readl(IOMUXC_GPR10);
val |= GPR_TZASC_EN; val |= GPR_TZASC_EN;
#ifdef CONFIG_IMX8MM
val |= GPR_TZASC_SWAP_ID;
#endif
writel(val, IOMUXC_GPR10); writel(val, IOMUXC_GPR10);
val |= GPR_TZASC_EN_LOCK; val |= GPR_TZASC_EN_LOCK;
writel(val, IOMUXC_GPR10); writel(val, IOMUXC_GPR10);
......
...@@ -125,6 +125,7 @@ ...@@ -125,6 +125,7 @@
#define IOMUXC_GPR22 (IOMUXC_GPR_BASE_ADDR + 0x58) #define IOMUXC_GPR22 (IOMUXC_GPR_BASE_ADDR + 0x58)
#define GPR_TZASC_EN (1 << 0) #define GPR_TZASC_EN (1 << 0)
#define GPR_TZASC_SWAP_ID (1 << 1)
#define GPR_TZASC_EN_LOCK (1 << 16) #define GPR_TZASC_EN_LOCK (1 << 16)
#define CNTCR_OFF 0x00 #define CNTCR_OFF 0x00
......
...@@ -190,8 +190,7 @@ int power_init_board(void) ...@@ -190,8 +190,7 @@ int power_init_board(void)
void spl_board_init(void) void spl_board_init(void)
{ {
/* TODO */ enable_tzc380();
/* enable_tzc380(); */
setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
......
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