Commit c50a1156 authored by Ye Li's avatar Ye Li
Browse files

MLK-14390-1 mx6sllarm2: Add mx6sll LPDDR2/3 ARM2 board codes



Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: default avatarYe Li <ye.li@nxp.com>
parent 5d1ac94d
......@@ -226,6 +226,13 @@ config TARGET_MX6SLLEVK
select DM
select DM_THERMAL
config TARGET_MX6SLL_ARM2
bool "mx6sll arm2"
select BOARD_LATE_INIT
select MX6SLL
select DM
select DM_THERMAL
config TARGET_MX6SXSABRESD
bool "mx6sxsabresd"
select MX6SX
......@@ -423,6 +430,7 @@ source "board/freescale/mx6qarm2/Kconfig"
source "board/freescale/mx6qsabreauto/Kconfig"
source "board/freescale/mx6sabresd/Kconfig"
source "board/freescale/mx6slevk/Kconfig"
source "board/freescale/mx6sll_arm2/Kconfig"
source "board/freescale/mx6sllevk/Kconfig"
source "board/freescale/mx6sxsabresd/Kconfig"
source "board/freescale/mx6sxsabreauto/Kconfig"
......
if TARGET_MX6SLL_ARM2
config SYS_BOARD
default "mx6sll_arm2"
config SYS_VENDOR
default "freescale"
config SYS_CONFIG_NAME
default "mx6sll_arm2"
endif
# (C) Copyright 2016 Freescale Semiconductor, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := mx6sll_arm2.o
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sll_arm2/plugin.bin 0x00907000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
/* Enable all clocks */
DATA 4 0x020c4068 0xffffffff
DATA 4 0x020c406c 0xffffffff
DATA 4 0x020c4070 0xffffffff
DATA 4 0x020c4074 0xffffffff
DATA 4 0x020c4078 0xffffffff
DATA 4 0x020c407c 0xffffffff
DATA 4 0x020c4080 0xffffffff
DATA 4 0x020E0550 0x00080000
DATA 4 0x020E0534 0x00000000
DATA 4 0x020E02AC 0x00000030
DATA 4 0x020E0548 0x00000030
DATA 4 0x020E052C 0x00000030
DATA 4 0x020E0530 0x00020000
DATA 4 0x020E02B0 0x00003030
DATA 4 0x020E02B4 0x00003030
DATA 4 0x020E02B8 0x00003030
DATA 4 0x020E02BC 0x00003030
DATA 4 0x020E0540 0x00020000
DATA 4 0x020E0544 0x00000030
DATA 4 0x020E054C 0x00000030
DATA 4 0x020E0554 0x00000030
DATA 4 0x020E0558 0x00000030
DATA 4 0x020E0294 0x00000030
DATA 4 0x020E0298 0x00000030
DATA 4 0x020E029C 0x00000030
DATA 4 0x020E02A0 0x00000030
DATA 4 0x020E02C0 0x00082030
DATA 4 0x021B001C 0x00008000
DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B085c 0x084700C7
DATA 4 0x021B0890 0x00400000
DATA 4 0x021B0848 0x3C3A3C3C
DATA 4 0x021B0850 0x24293625
DATA 4 0x021B081C 0x33333333
DATA 4 0x021B0820 0x33333333
DATA 4 0x021B0824 0x33333333
DATA 4 0x021B0828 0x33333333
DATA 4 0x021B082C 0xf3333333
DATA 4 0x021B0830 0xf3333333
DATA 4 0x021B0834 0xf3333333
DATA 4 0x021B0838 0xf3333333
DATA 4 0x021B08C0 0x24922492
DATA 4 0x021B08b8 0x00000800
DATA 4 0x021B0004 0x00020052
DATA 4 0x021B000C 0x53574333
DATA 4 0x021B0010 0x00100B22
DATA 4 0x021B0038 0x00170778
DATA 4 0x021B0014 0x00C700DB
DATA 4 0x021B0018 0x00201718
DATA 4 0x021B002C 0x0F9F26D2
DATA 4 0x021B0030 0x009F0E10
DATA 4 0x021B0040 0x0000005F
DATA 4 0x021B0000 0xC4190000
DATA 4 0x021B001C 0x00008050
DATA 4 0x021B001C 0x00008058
DATA 4 0x021B001C 0x003F8030
DATA 4 0x021B001C 0x003F8038
DATA 4 0x021B001C 0xFF0A8030
DATA 4 0x021B001C 0xFF0A8038
DATA 4 0x021B001C 0x04028030
DATA 4 0x021B001C 0x04028038
DATA 4 0x021B001C 0x83018030
DATA 4 0x021B001C 0x83018038
DATA 4 0x021B001C 0x01038030
DATA 4 0x021B001C 0x01038038
DATA 4 0x021B083C 0x20000000
DATA 4 0x021B0020 0x00001800
DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B0004 0x00020052
DATA 4 0x021B0404 0x00011006
DATA 4 0x021B001C 0x00000000
#endif
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Refer docs/README.imxmage for more details about how-to configure
* and create imximage boot image
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi, sd (the board has no nand neither onenand)
*/
BOOT_FROM sd
#ifdef CONFIG_USE_IMXIMG_PLUGIN
/*PLUGIN plugin-binary-file IRAM_FREE_START_ADDR*/
PLUGIN board/freescale/mx6sll_arm2/plugin.bin 0x00907000
#else
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
/* Enable all clocks */
DATA 4 0x020c4068 0xffffffff
DATA 4 0x020c406c 0xffffffff
DATA 4 0x020c4070 0xffffffff
DATA 4 0x020c4074 0xffffffff
DATA 4 0x020c4078 0xffffffff
DATA 4 0x020c407c 0xffffffff
DATA 4 0x020c4080 0xffffffff
DATA 4 0x020E0550 0x00080000
DATA 4 0x020E0534 0x00000000
DATA 4 0x020E02AC 0x00000030
DATA 4 0x020E0548 0x00000030
DATA 4 0x020E052C 0x00000030
DATA 4 0x020E0530 0x00020000
DATA 4 0x020E02B0 0x00003030
DATA 4 0x020E02B4 0x00003030
DATA 4 0x020E02B8 0x00003030
DATA 4 0x020E02BC 0x00003030
DATA 4 0x020E0540 0x00020000
DATA 4 0x020E0544 0x00000030
DATA 4 0x020E054C 0x00000030
DATA 4 0x020E0554 0x00000030
DATA 4 0x020E0558 0x00000030
DATA 4 0x020E0294 0x00000030
DATA 4 0x020E0298 0x00000030
DATA 4 0x020E029C 0x00000030
DATA 4 0x020E02A0 0x00000030
DATA 4 0x020E02C0 0x00082030
DATA 4 0x021B001C 0x00008000
DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B085c 0x084700C7
DATA 4 0x021B0890 0x00400000
DATA 4 0x021B0848 0x3A383C40
DATA 4 0x021B0850 0x242C3020
DATA 4 0x021B081C 0x33333333
DATA 4 0x021B0820 0x33333333
DATA 4 0x021B0824 0x33333333
DATA 4 0x021B0828 0x33333333
DATA 4 0x021B082C 0xf3333333
DATA 4 0x021B0830 0xf3333333
DATA 4 0x021B0834 0xf3333333
DATA 4 0x021B0838 0xf3333333
DATA 4 0x021B08C0 0x24922492
DATA 4 0x021B08b8 0x00000800
DATA 4 0x021B0004 0x00020052
DATA 4 0x021B000C 0x53574333
DATA 4 0x021B0010 0x00100A82
DATA 4 0x021B0038 0x00170777
DATA 4 0x021B0014 0x00C70093
DATA 4 0x021B0018 0x00201708
DATA 4 0x021B002C 0x0F9F26D2
DATA 4 0x021B0030 0x009F0E10
DATA 4 0x021B0040 0x0000004F
DATA 4 0x021B0000 0xC3110000
DATA 4 0x021B001C 0x00008050
DATA 4 0x021B001C 0x00008058
DATA 4 0x021B001C 0x003F8030
DATA 4 0x021B001C 0x003F8038
DATA 4 0x021B001C 0xFF0A8030
DATA 4 0x021B001C 0xFF0A8038
DATA 4 0x021B001C 0x04028030
DATA 4 0x021B001C 0x04028038
DATA 4 0x021B001C 0x82018030
DATA 4 0x021B001C 0x82018038
DATA 4 0x021B001C 0x01038030
DATA 4 0x021B001C 0x01038038
DATA 4 0x021B083C 0x20000000
DATA 4 0x021B0020 0x00001800
DATA 4 0x021B0800 0xA1390003
DATA 4 0x021B0004 0x00020052
DATA 4 0x021B0404 0x00011006
DATA 4 0x021B001C 0x00000000
#endif
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/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
/* DDR script */
.macro imx6sll_lpddr3_arm2_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x00080000
str r1, [r0, #0x550]
ldr r1, =0x00000000
str r1, [r0, #0x534]
ldr r1, =0x00000030
str r1, [r0, #0x2AC]
str r1, [r0, #0x548]
str r1, [r0, #0x52C]
ldr r1, =0x00020000
str r1, [r0, #0x530]
ldr r1, =0x00003030
str r1, [r0, #0x2B0]
str r1, [r0, #0x2B4]
str r1, [r0, #0x2B8]
str r1, [r0, #0x2BC]
ldr r1, =0x00020000
str r1, [r0, #0x540]
ldr r1, =0x00000030
str r1, [r0, #0x544]
str r1, [r0, #0x54C]
str r1, [r0, #0x554]
str r1, [r0, #0x558]
str r1, [r0, #0x294]
str r1, [r0, #0x298]
str r1, [r0, #0x29C]
str r1, [r0, #0x2A0]
ldr r1, =0x00082030
str r1, [r0, #0x2C0]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r1, =0x00008000
str r1, [r0, #0x1C]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x084700C7
str r1, [r0, #0x85C]
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x3C3A3C3C
str r1, [r0, #0x848]
ldr r1, =0x24293625
str r1, [r0, #0x850]
ldr r1, =0x33333333
str r1, [r0, #0x81C]
str r1, [r0, #0x820]
str r1, [r0, #0x824]
str r1, [r0, #0x828]
ldr r1, =0xf3333333
str r1, [r0, #0x82C]
str r1, [r0, #0x830]
str r1, [r0, #0x834]
str r1, [r0, #0x838]
ldr r1, =0x24922492
str r1, [r0, #0x8C0]
ldr r1, =0x00000800
str r1, [r0, #0x8B8]
ldr r1, =0x00020052
str r1, [r0, #0x004]
ldr r1, =0x53574333
str r1, [r0, #0x00C]
ldr r1, =0x00100B22
str r1, [r0, #0x010]
ldr r1, =0x00170778
str r1, [r0, #0x038]
ldr r1, =0x00C700DB
str r1, [r0, #0x014]
ldr r1, =0x00201718
str r1, [r0, #0x018]
ldr r1, =0x0F9F26D2
str r1, [r0, #0x02C]
ldr r1, =0x009F0E10
str r1, [r0, #0x030]
ldr r1, =0x0000005F
str r1, [r0, #0x040]
ldr r1, =0xC4190000
str r1, [r0, #0x000]
ldr r1, =0x00008050
str r1, [r0, #0x01C]
ldr r1, =0x00008058
str r1, [r0, #0x01C]
ldr r1, =0x003F8030
str r1, [r0, #0x01C]
ldr r1, =0x003F8038
str r1, [r0, #0x01C]
ldr r1, =0xFF0A8030
str r1, [r0, #0x01C]
ldr r1, =0xFF0A8038
str r1, [r0, #0x01C]
ldr r1, =0x04028030
str r1, [r0, #0x01C]
ldr r1, =0x04028038
str r1, [r0, #0x01C]
ldr r1, =0x83018030
str r1, [r0, #0x01C]
ldr r1, =0x83018038
str r1, [r0, #0x01C]
ldr r1, =0x01038030
str r1, [r0, #0x01C]
ldr r1, =0x01038038
str r1, [r0, #0x01C]
ldr r1, =0x20000000
str r1, [r0, #0x83C]
ldr r1, =0x00001800
str r1, [r0, #0x020]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x00020052
str r1, [r0, #0x004]
ldr r1, =0x00011006
str r1, [r0, #0x404]
ldr r1, =0x00000000
str r1, [r0, #0x01C]
.endm
.macro imx6sll_lpddr2_arm2_setting
ldr r0, =IOMUXC_BASE_ADDR
ldr r1, =0x00080000
str r1, [r0, #0x550]
ldr r1, =0x00000000
str r1, [r0, #0x534]
ldr r1, =0x00000030
str r1, [r0, #0x2AC]
str r1, [r0, #0x548]
str r1, [r0, #0x52C]
ldr r1, =0x00020000
str r1, [r0, #0x530]
ldr r1, =0x00003030
str r1, [r0, #0x2B0]
str r1, [r0, #0x2B4]
str r1, [r0, #0x2B8]
str r1, [r0, #0x2BC]
ldr r1, =0x00020000
str r1, [r0, #0x540]
ldr r1, =0x00000030
str r1, [r0, #0x544]
str r1, [r0, #0x54C]
str r1, [r0, #0x554]
str r1, [r0, #0x558]
str r1, [r0, #0x294]
str r1, [r0, #0x298]
str r1, [r0, #0x29C]
str r1, [r0, #0x2A0]
ldr r1, =0x00082030
str r1, [r0, #0x2C0]
ldr r0, =MMDC_P0_BASE_ADDR
ldr r1, =0x00008000
str r1, [r0, #0x1C]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x084700C7
str r1, [r0, #0x85C]
ldr r1, =0x00400000
str r1, [r0, #0x890]
ldr r1, =0x3A383C40
str r1, [r0, #0x848]
ldr r1, =0x242C3020
str r1, [r0, #0x850]
ldr r1, =0x33333333
str r1, [r0, #0x81C]
str r1, [r0, #0x820]
str r1, [r0, #0x824]
str r1, [r0, #0x828]
ldr r1, =0xf3333333
str r1, [r0, #0x82C]
str r1, [r0, #0x830]
str r1, [r0, #0x834]
str r1, [r0, #0x838]
ldr r1, =0x24922492
str r1, [r0, #0x8C0]
ldr r1, =0x00000800
str r1, [r0, #0x8B8]
ldr r1, =0x00020052
str r1, [r0, #0x004]
ldr r1, =0x53574333
str r1, [r0, #0x00C]
ldr r1, =0x00100A82
str r1, [r0, #0x010]
ldr r1, =0x00170777
str r1, [r0, #0x038]
ldr r1, =0x00C70093
str r1, [r0, #0x014]
ldr r1, =0x00201708
str r1, [r0, #0x018]
ldr r1, =0x0F9F26D2
str r1, [r0, #0x02C]
ldr r1, =0x009F0E10
str r1, [r0, #0x030]
ldr r1, =0x0000004F
str r1, [r0, #0x040]
ldr r1, =0xC3110000
str r1, [r0, #0x000]
ldr r1, =0x00008050
str r1, [r0, #0x01C]
ldr r1, =0x00008058
str r1, [r0, #0x01C]
ldr r1, =0x003F8030
str r1, [r0, #0x01C]
ldr r1, =0x003F8038
str r1, [r0, #0x01C]
ldr r1, =0xFF0A8030
str r1, [r0, #0x01C]
ldr r1, =0xFF0A8038
str r1, [r0, #0x01C]
ldr r1, =0x04028030
str r1, [r0, #0x01C]
ldr r1, =0x04028038
str r1, [r0, #0x01C]
ldr r1, =0x82018030
str r1, [r0, #0x01C]
ldr r1, =0x82018038
str r1, [r0, #0x01C]
ldr r1, =0x01038030
str r1, [r0, #0x01C]
ldr r1, =0x01038038
str r1, [r0, #0x01C]
ldr r1, =0x20000000
str r1, [r0, #0x83C]
ldr r1, =0x00001800
str r1, [r0, #0x020]
ldr r1, =0xA1390003
str r1, [r0, #0x800]
ldr r1, =0x00020052
str r1, [r0, #0x004]
ldr r1, =0x00011006
str r1, [r0, #0x404]
ldr r1, =0x00000000
str r1, [r0, #0x01C]
.endm
.macro imx6_clock_gating
ldr r0, =CCM_BASE_ADDR
ldr r1, =0xffffffff
str r1, [r0, #0x068]
str r1, [r0, #0x06c]
str r1, [r0, #0x070]
str r1, [r0, #0x074]
str r1, [r0, #0x078]
str r1, [r0, #0x07c]
str r1, [r0, #0x080]
.endm
.macro imx6_qos_setting
.endm
.macro imx6_ddr_setting
#if defined (CONFIG_LPDDR2)
imx6sll_lpddr2_arm2_setting
#else
imx6sll_lpddr3_arm2_setting
#endif
.endm
/* include the common plugin code here */
#include <asm/arch/mx6_plugin.S>
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage_lpddr2.cfg,LPDDR2"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLL_ARM2=y
CONFIG_CMD_GPIO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLL_ARM2=y
CONFIG_CMD_GPIO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg,MXC_EPDC"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLL_ARM2=y
CONFIG_CMD_GPIO=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sll_arm2/imximage.cfg,SYS_BOOT_SPINOR"
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_TARGET_MX6SLL_ARM2=y
CONFIG_CMD_GPIO=y