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NAND module is pin conflict with SD/eMMC on i.MX8QXP ARM2 board,
add new config to disable SD/eMMC when booting from NAND.
Signed-off-by: Han Xu <han.xu@nxp.com>

enable the GPMI NAND driver for i.MX8, the major changes

- register defination for i.mx8
- Makefile change for misc.c
- DMA structure must be 32bit address
Signed-off-by: Han Xu <han.xu@nxp.com>

Enable pinctrl/dm mmc/dm i2c/dm regulator and pmic.
Since we do not enable DM for SPL, so move non dm
code to spl file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

This patch enables the power domain driver for i.MX8QM and QXP boards in defconfig files.
The devices with using DM driver will be powered on automatically by DM framework. So
we remove the power relevant codes for them.
For devices with non-DM drivers, we updates the board/SoC codes to use power domain driver API.
So that we can use power domain driver to manage them.

The only exceptions are:
1. UART0 at board_early_f, this is very early stage, that power domain is not ready.
2. Power up secondary cores and M4 cores. These resources are not peripherals and
   are not in power domain tree.

Additional, benefiting from power domain driver, We have implemented the function "power_off_pd_devices"
to power off all active devices. No need to explicitly power off them in board_quiesce_devices.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
needs add power domain trees with property "compatible = "nxp,imx8-pd";"

- When power on one PD device, the driver will power on its ancestor PD devices
in power domain tree.

- When power off on PD device, the driver will check its child PD devices first,
only all child PD devices are off, then power off the current PD device. Then the
driver checks sibling PD devices. If sibling PD devices are off, then it will power
off parent PD device.

- There is no counter maintained in this driver, but a state to hold current on/off
state. So the request and free functions are empty.

- The power domain implemetation in i.MX8 DTB set the "#power-domain-cells" to 0, so
there is no ID binding with each PD device. We don't use "id" variable in
struct power_domain. At same time, we have to set of_xlate to empty to bypass standard
of_xlate in uclass driver.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Support MFG.
1. When ROM jumps to SPL, SPL saves ROM context. After SPL successfully
   initialize DRAM, SPL will restore ROM and context and back to ROM.
   During this flow, SPL does not do any USB configuration to avoid
   breaking the connect between ROM and Host PC, because we rely on
   ROM to continue serial download with Host.
2. Add MFG env to support kernel boot correctly.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Default enable TZC380.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

To page mapping the lowest 2 bits needs to be 0x3.
If not fix this, the final lowest 3 bits for page mapping is 0x1
which is marked as reserved.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

    "
    commit a645f3c4c529e1f8cc5a624a047a3af56cfd39e1
    Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
    Date:   Thu Jun 29 15:21:53 2017 -0500

        Turn off all HDMI-TX clocks by default. This is required for setting
        the rate of the DIG PLL.
        Add code to enable/disable the correct clocks before SECO accesses the HD
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
    "
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>

Add common functions for LVDS/DC setup, video framebuffer init/disable,
LVDS to HDMI card settings, etc. Refactor it from video_imxdpuv1.c.
1. Add power, clocks, PLL relevant setup for LVDS and DC.
2. Configure the LVDS and its PHY settings for the display format and pixel link.
3. Setup the LVDS to HDMI card.
4. Implement the video_hw_init by calling DC driver API to output data to
   specified display panel.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

ROM will update ROM_SW_INFO according to boot media, so U-Boot could
reuse that info.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Power down wdog counter to avoid reset after 16 seconds.
Add set_wdog_set to configure wcr to use WDOG_B reset.
Configure iomux to output WDOG_B to reset system.
Build watchdog driver for imx8mq.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reuse imx-common code for cpuinfo.
Add a dummy crm_regs.h file, becasue imx-common code includes it.
Add src register map for i.MX8M.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

* add board support for android and android things.
  mx6ul_nxpu_iopb, pico-6ul, pico-imx7d, aquila-6ul
  reorganize the Kconfig, and fix the redefine issue.
* add android configure into configure-while
* add a common file mx_android_common.h
  it will be included by android and android things.
  defconfig only include ANDROID_THINGS_SUPPORT or ANDROID_SUPPORT
* move partition_table_valid into f_fastboot.c.
  it's a common code.
* add invalidate_dcache_range in fixed order.
  It will have salt invalid issue if we do not add it in order
* add display for pico-7d.

Change-Id: I6f8a4876c2f8bbd098034d1e3f53033109300bca
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>

Fix issue for API changed from v2017.
porting below patch from v2016.
commit 44834fd12f60a090e3d10ab6f84a75460894d49d

Change-Id: Ifaf0b86dd29648f9150646f00f54502676df9013
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>

Add ddr register memory map
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Include i.MX8M in lcdif register layout map.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Add soc level initialization code.
Add arch_cpu_init.
Add M4 boot.
Add timer_init.
Add cpuinfo
Add dummy SoC ID.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>

Add clock driver to support i.MX8M.
There are two kind PLLs, FRAC PLL and SSCG PLL.
ROM code already configured SYS PLL1/PLL2, so we
just enabled all the output here.
The clock root is similar to i.MX7D, so have similar
code structure as i.MX7D. The clock_slice is mainly for
setting clock root.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

Add pin header file for i.MX8M.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Add register definition header file for i.MX8M.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>

without this patch, the QoS setting will be lost after exit LPSR mode.
The patch moves the QoS setting into DDR setting group (in plugin mode), thus
when exit LPSR mode, QoS setting will be restored as well as DDR setting.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit 0b217456375bace3fbe9a72c7e92a46dc1907277)

Add the otg power and clock settings functions. The USBOH clocks are
from Connectivity subsystem's internal bus clocks, which are enabled
at default, so no operation needed to enable them.
Signed-off-by: Ye Li <ye.li@nxp.com>

The i.MX8 has two USB controllers: USBOH and USB3. The USBOH reuses
previous i.MX6/7. It has same PHY IP as i.MX7ULP but NC registers
are same as i.MX7D. So add its support in ehci-mx6 driver.

Also the driver is updated to remove build warning for 64 bits CPU.
Signed-off-by: Ye Li <ye.li@nxp.com>

Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>

Add boot from usb support.
Follow same flow as i.mx6 chips.
Signed-off-by: Peng Fan <peng.fan@nxp.com>

Add a print for current boot device to u-boot console.
Signed-off-by: Ye Li <ye.li@nxp.com>

For i.MX8QM and QXP, ROM provides rom info structure for passing boot device and
other boot information. Use it to implement the common function get_boot_device.
Signed-off-by: Ye Li <ye.li@nxp.com>

There two MIPI/LVDS combo modules on i.MX8QXP DC0, different as i.MX8QM.
Update the power domains for the MIPI DSI I2C controllers.
Signed-off-by: Ye Li <ye.li@nxp.com>

Add support for iMX8 SoC platforms, and extend to support LSIO GPIO0..GPIO7 ports.
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms,
so we have to adjust the index accordingly.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory
to u-boot include directory as a common header file.
Signed-off-by: Ye Li <ye.li@nxp.com>

1. Adjust bootaux interface to adapt 64bits address and add core id.
2. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
   M4 image to any DDR address first. Then use the
   "bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
   or CM4_1, the default core id is 0 for CM4_0.

   Since current M4 only supports running in TCM. The bootaux will copy
   the M4 image from DDR to its TCML.

3. Implment bootaux for HIFI on QXP
   command: bootaux 0x81000000 1
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

We setup SMMU in arch_preboot_os to avoid breaking u-boot driver.
Add a kconfig entry CONFIG_IMX_SMMU to enable it.
So far, the USDHC0-USDHC1 and FEC0-FEC1 are added into sid.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Wrap the iomux settings through SCU APIs. Provide interfaces to follow
other i.MX platforms.

Users need to define the iomux_cfg_t which combines of three parts:
<PAD id> | <MUX ALT> | <PAD & MUX CONFIG>

<PAD id>   can directly use the values in imx8qm_pins.h
<MUX ALT>  is optional if the select to use default mux. Otherwise using
           MUX_MODE_ALT(x) to set it.
<PAD & MUX CONFIG> is the value for CONFIG, LP_CONFIG, PULL control, Drive Strength in
           Padring control register.
Signed-off-by: Ye Li <ye.li@nxp.com>

Add cpu, power, and clocks functions for support i.MX8QM and i.MX8QXP SoCs.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Add the i.MX8QM and i.MX8QXP header files used for pad configurations.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Add the MU (message unit) driver for IPC with SCFW.
Add CONFIG_HAVE_SC_FIRMWARE for enabling the IPC feature and holding the
IP channel in global data.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Using the latest SCFW-API based on commit from SCFW master branch:
"commit 0d7528ab8d243d8de60ac33a473a4988c3135b28
 Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
 Date:   Wed May 10 13:13:12 2017 -0500

 Add support to change the parent of clock slices in a SS.
"
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>

Integrate the FSL android fastboot features into community's fastboot.

1. Use USB gadget g_dnl driver
2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and
   EFI partitions are not support by i.MX.
3. Add FDT support to community's android image.
4. Add a new boot command "boota" for android image boot. The boota
   implements to load ramdisk and fdt to their loading addresses
   specified in boot.img header, while bootm won't do it for android image.
5. Support the authentication of boot.img at the "load_addr" for
   both SD and NAND.
6. We use new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot
   with relevant header file "fsl_fastboot.h". While disabling the
   configuration, the community fastboot is used.
7. Overwrite the cmdline in boot.img by using bootargs saved in local environment.
8. Add recovery and reboot-bootloader support.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 23d63ff185929fff5e392efc853d69b606ba081a)

The i.MX6SL EVK needs this driver in android fastboot support. Add
this driver to u-boot.

To use the driver, user must define:

CONFIG_MXC_KPD          Enable the driver
CONFIG_MXC_KEYMAPPING   Key mapping matrix
CONFIG_MXC_KPD_COLMAX   The column size of key mapping matrix
CONFIG_MXC_KPD_ROWMAX   The row size of the key mapping matrix
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5096e572667ff41217deb4ba9b1bd15e93fa6b59)