- 05 Apr, 2017 40 commits
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Ye Li authored
Copy the DTS files from kernel for 14x14/17x17/19x19 ARM2 board for preparing enabling the OF_CONTROL. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Copy the board codes and build configurations for i.MX6SX 14x14/17x17/19x19 ARM2 boards from v2016.03 as the base for converting to OF_CONTROL and DM driver. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6sll lpddr2/3 arm2 board codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Enable USB DM driver 3. Update PMIC code for using DM PMIC 4. Add spinor boot support, pin conflict with LCD, will disable LCD. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Copy the DTS files from kernel for LPDDR2/3 ARM2 board for preparing enabling the OF_CONTROL. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Move the mx6sll lpddr2/3 arm2 board codes and defconfigs from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6ull ddr3 arm2 board codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update QSPI settings and codes for DM QSPI driver. 2. Update GPIO codes for adding gpio request 3. Enable FEC DM driver and update relevant configurations 4. Enable USB DM driver 5. Update PMIC and LDO by-pass codes for DM PMIC 6. Add various boot media support, QSPI/NAND/SPINOR 7. Add rework support for eMMC/QSPIB/TSC Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Copy the DTS files from kernel for DDR3 ARM2 board for preparing enabling the OF_CONTROL. Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using DM SPI driver. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Enable the module disable fuse checking configurations, and ENET fuse checking during ENET setup. Signed-off-by:
Ye Li <ye.li@nxp.com> Tested-by:
Bai Ping <ping.bai@nxp.com> (cherry picked from commit d2192a3909be8ab9433082e7c04c917489b28e25)
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Ye Li authored
Add fuse checking for EPDC module. Once the fused is programmed, the EPDC module is disabled, can't to access it. Signed-off-by:
Ye Li <ye.li@nxp.com> Tested-by:
Bai Ping <ping.bai@nxp.com> (cherry picked from commit ea7429b70c1eb2cf475028ee8df2ac9ed18b3c82)
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Ye Li authored
Add the modules disable fuses mapping with FDT nodes and devices name. Signed-off-by:
Ye Li <ye.li@nxp.com> Tested-by:
Bai Ping <ping.bai@nxp.com> (cherry picked from commit d033825f034467fa9c9aeff6fcf95a146c802cf1)
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Robby Cai authored
add splash screen feature for epdc. it's tested on imx6ull arm2 board. Signed-off-by:
Robby Cai <robby.cai@nxp.com> (cherry picked from commit bcdbe240bb2a97d38ba30dd244a51ece87662b06)
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Ye Li authored
Move the mx6ull ddr3 arm2 board codes and defconfigs from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6ul ddr3 arm2 and lpddr2 arm2 boards codes and build configurations to enable OF_CONTROL and DM drivers. 1. Update QSPI settings and codes for DM QSPI driver. 2. Update GPIO codes for adding gpio request 3. Enable FEC DM driver and update relevant configurations 4. Enable USB DM driver 5. Update PMIC and LDO by-pass codes for DM PMIC 6. Add various boot media support, QSPI/NAND/SPINOR/EIMNOR Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Copy the DTS files from kernel for DDR3 ARM2 board and LPDDR2 ARM2 board preparing for enabling OF_CONTROL. Modify the QSPI n25q256a flash node's compatible to "spi-flash" for using DM SPI driver. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Move the mx6ul DDR3/LPDDR2 ARM2 boards codes from v2016.03 u-boot as the base for OF_CONTROL enabling. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6ulevk board files and build configurations to enable OF_CONTROL and DM drivers. 1. QSPI settings and codes update for using DM QSPI driver. For DM and non-DM driver, the AMBA address is not same. 2. Update configurations for DM i2c driver, using CONFIG_SYS_I2C for non-DM driver 3. GPIO update for adding gpio_request 4. Add FEC DM driver support for two FEC controllers. 5. Enable USB DM driver. 6. Enable 74X164 DM driver for 74LV controlling. 7. Enable PMIC DM driver for 9x9 EVK Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update i.MX6ul dtsi file and add mx6ul 14x14 and 9x9 evk DTS file to latest in kernel. To support DM QSPI driver, modify the DTS files with adding a spi0 alias for qspi node and changing the the n25q256a flash node's compatible to "spi-flash" Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update i.MX6SLL dtsi file and mx6sll-evk DTS file to latest in kernel. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6slevk board files and build configurations to enable OF_CONTROL and DM drivers. 1. Update PMIC and LDO-bypass codes for DM PMIC driver. 2. Update configurations for DM i2c driver 3. GPIO update for adding gpio_request 4. Remove duplicated configurations from build config Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update i.MX6SL dtsi file and dt-binding header files. Add the imx6sl-evk DTS file preparing for using DTB. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Enable FEC, USB and QSPI DM driver in build configuration and update board file for them. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Copy the imx6sx-sdb latest DTS file from imx_4.1.y kernel. To support DM QSPI driver, modify the n25q256a flash node's compatible to "spi-flash". Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6sxsabresd board files and build configurations to enable OF_CONTROL and DM drivers. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update i.MX6SX dtsi file and relevant DTS header files. Add the imx6sx-sdb DTS files preparing for using DTB. To support DM QSPI driver 1. Modify the n25q256a flash node's compatible to "spi-flash". 2. Add spi0 and spi1 alias for qspi1 and qspi2. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6qpsabreauto build configurations to use OF_CONTROL and DM driver. Also add the imx6qpsabreauto DTS file for using DTB. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6dl/solosabreauto build configurations to use OF_CONTROL and DM driver. Also add the imx6dlsabreauto DTS file for using DTB. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Enable OF_CONTROL and DM driver on mx6qsabreauto. 1. Add the imx6qsabreauto relevant DTS file for using DTB. 2. Modify PMIC initialization codes to use DM PMIC driver. 3. Modify to use PCA953X DM driver 4. Remove NAND from default, since the default imx6q-sabreauto.dts disabled the nand. The pins are conflicted with UART3, while UART3 is enabled. 5. For NAND build configuration, remove the USB, since the imx6q-sabreauto-gpmi-weim.dts will have pin conflicts on steer logic. 6. GPIO requests added. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Enable OF_CONTROL and DM driver on mx6dlsabresd. And add the imx6dl sabresd DTS file for using DTB. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Since we have enabled the i.MX6QP sabresd board with OF_CONTROL and DM driver. Add the imx6qp DTS file and imx6qp sabresd DTS file for build. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
1. Add build configs for i.MX6ULL 9X9 EVK. Enable DM I2C driver and DM PMIC driver for pfuze3000. Convert power init codes to use DM PMIC driver. 2. Add lpddr2 script IMX6ULL_9X9_LPDDR2_400MHz_16bit_V1.2.inc for the 9x9 board. Refer the commit 44a84b44a84cd1bdcc54d722987e5f109510891b 3. Add DTS file for 9x9 evk board. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
To support boot from QSPI/NAND/eMMC, add relevant DTS files and build configurations. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6ull evk to add features from v2016.03. 1. Add support for NAND flash. 2. Add support for QSPI DM driver. 3. Add USB DM driver support. 4. Add two FEC support by using DM FEC driver 5. Update environments for various boot devices support: SD/NAND/eMMC/QSPI 6. Add MFGtool environments. 7. Add board codes for 9x9 EVK board For the DTS file, some changes are needed for using QSPI DM driver 1. Add spi0 alias for qspi node. Which is used for bus number 0. 2. Modify the n25q256a@0 compatible property to "spi-flash". 3. Modify spi4 (gpio_spi) node to spi5 Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
After porting to v2017.03. we start to use community's QSPI driver, not the one we maintained before in v2014-v2016. The new QSPI driver only supports i.MX6SX. This patch adds support for i.MX6UL and i.MX7D Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
Update mx6sll EVK board codes for features: 1. Add SD/MMC dynamical device detect. 2. Add wdog set for kernel. 3. Add mfgtool environments. 4. Modify SD/MMC environment offset. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
The PHY settings for RGMII has been removed from mx6qsabreauto board codes, due to the atheros PHY driver have updated to use same configuration for AR8031 and AR8035, while this configuration is duplicated as we set in board codes. But in recent codes, the PHY driver added a patch for AR8031 independent config. So needs to add the PHY settings back to the board codes. Signed-off-by:
Ye Li <ye.li@nxp.com>
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Ye Li authored
We found a issue in PLL6 ENET that changing the bit[1:0] DIV_SELECT for ENET ref clock will impact the SATA ref 100Mhz clock. If SATA is initialized before this changing, SATA read/write can't work after it. And we have to re-init SATA. The issue can reproduce on both i.MX6DQP and i.MX6DQ. IC investigation is ongoing. This patch is an work around that moves the ENET clock setting (enable_fec_anatop_clock) from ethernet init to board_init which is prior than SATA initialization. So there is no PLL6 change after SATA init. Signed-off-by:
Ye Li <ye.li@nxp.com> (cherry picked from commit fd8fbf7fa0b10199ac89cd13cae851149f51accb)
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Ye Li authored
In u-boot, i.MX6QP sabresd board uses 125Mhz ref clock from PHY, While kernel uses the clock from internal PLL by setting GPR5 bit 9. When doing warm reset in kernel, the GPR regigster is not reset, so the clock source still is the PLL. This causes ENET in u-boot can't work. In this patch, we change the u-boot to use internal PLL to align with kernel for i.MX6QP. This also fixes the ENET issue after kernel warm reset. Signed-off-by:
Ye Li <ye.li@nxp.com> (cherry picked from commit 7f00c72e17e4e440df62aa4945a619fdbc9cfd8f)
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Ye Li authored
Current environment offset on NAND is 37MB, this will cause a alignment issue when erasing if nand erase block is 2MB. The saveenv is failed. => saveenv Saving Environment to NAND... Erasing NAND... Attempt to erase non block-aligned data Since the max erase block we supported is 4MB, adjust the env offset to 60MB, where is the last 4MB in 64MB reserved area for boot. Signed-off-by:
Ye Li <ye.li@nxp.com> (cherry picked from commit 22f6c4b151fbdea1985403086715de841152c880)
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Ye.Li authored
Since from mx7, we use fixed IVT offset for all boot devices. Introduce a new configuration CONFIG_IMX_FIXED_IVT_OFFSET for this. Signed-off-by:
Peng Fan <Peng.Fan@freescale.com> Signed-off-by:
Ye.Li <B37916@freescale.com> (cherry picked from commit 88e0a3552b08627b18d98380a32dbafacb18854b) (cherry picked from commit 3d52e221ed444dab96038a2417d1dcb2217ad593) (cherry picked from commit 13d39c51bbaabbcf3b72516d8ac3f1853f686ace)
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Peng Fan authored
Define CONFIG_MX6QP which will also set CONFIG_MX6Q, otherwise plugin code will use wrong ddr script. Signed-off-by:
Peng Fan <peng.fan@nxp.com> (cherry picked from commit 901d9eb01736ab54822678a197fe1aeb281a81b9)
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