1. 05 Sep, 2018 1 commit
    • Ye Li's avatar
      MLK-19433-2 imx8mq: Get chip rev for B1 revision · 9dba7a4d
      Ye Li authored
      
      
      The mscale B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
      It returns a magic number 0xff0055aa.
      Update get_cpu_rev to support this way, also enable OCOTP clock to allow
      access OCOTP register.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 866631c2140b9352c6f74ec36d1a51fea40c0445)
      9dba7a4d
  2. 03 Sep, 2018 1 commit
    • Ye Li's avatar
      MLK-19355 imx8mm: Enable sec_debug clock in SPL · c738b76a
      Ye Li authored
      
      
      ipg_stop from GPC is not connected to WDOG directly, the sec_debug clock is
      used to sample the ipg_stop from GPC. So when this clock is off, ipg_stop input
      of WDOG can’t assert, WDOG will fail to stop in DSM mode.
      Enable this clock forever in SPL, so other SW don't need to touch it.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      Tested-by: default avatarBai Ping <ping.bai@nxp.com>
      (cherry picked from commit 1da6c9b3a837d15c25086af449462d5e8b56c290)
      c738b76a
  3. 28 Aug, 2018 1 commit
    • Zhang Bo's avatar
      MA-12536[Android] Enable RTC for imx8m in uboot · b6a1a19c
      Zhang Bo authored
      
      
      Enable RTC in bootloader to avoid rtc time less than jiffies time
      when linux first bootup after RTC lose power.
      It will cause the issue as
      MA-9554[Android_6DL_SD]RTC: Sometimes the RTC reset to the initial
      time 1970 after softare reboot the first time. 40%
      
      Change-Id: I0c87180640be98a2c928a30c6949f91f4515844d
      Signed-off-by: default avatarZhang Bo <bo.zhang@nxp.com>
      b6a1a19c
  4. 21 Aug, 2018 1 commit
  5. 16 Aug, 2018 1 commit
  6. 08 Aug, 2018 1 commit
    • Ye Li's avatar
      MLK-19159 imx8mm_evk: Fix build break for flexspi defconfig · 42d21af4
      Ye Li authored
      
      
      The flexspi defconfig uses CONFIG_ENV_IS_IN_SPI_FLASH not CONFIG_ENV_IS_IN_MMC.
      So when fastboot is enabled for flexspi, the build break happens.
      
      drivers/usb/gadget/built-in.o: In function `board_fastboot_setup':
      /home/leyoen/Workspace/uboot-imx/drivers/usb/gadget/f_fastboot.c:1539: undefined reference to `mmc_get_env_dev'
      drivers/usb/gadget/built-in.o: In function `_fastboot_setup_dev':
      /home/leyoen/Workspace/uboot-imx/drivers/usb/gadget/f_fastboot.c:1260: undefined reference to `mmc_get_env_dev'
      drivers/usb/gadget/built-in.o: In function `get_single_var':
      /home/leyoen/Workspace/uboot-imx/drivers/usb/gadget/f_fastboot.c:2935: undefined reference to `mmc_get_env_dev'
      drivers/usb/gadget/built-in.o: In function `bcb_rw_block':
      /home/leyoen/Workspace/uboot-imx/drivers/usb/gadget/bcb.c:120: undefined reference to `mmc_get_env_dev'
      
      Fix the issue by decoupling mmc_get_env_dev function with CONFIG_ENV_IS_IN_MMC
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 2716f9a325681737593b3a6e79f94576a35067c2)
      42d21af4
  7. 23 Jul, 2018 2 commits
  8. 20 Jul, 2018 1 commit
  9. 19 Jul, 2018 1 commit
  10. 16 Jul, 2018 1 commit
    • Ye Li's avatar
      MLK-18897 imx8qm/qxp: Fix build warning in fuse driver · 8c9f2dbf
      Ye Li authored
      
      
      Get such warning below in fuse driver, due to a u32 pointer is converted to ulong then
      passed as ulong pointer.
      This is dangerous when assigning value to the memory where ulong pointer points to.
      So use a intermediate variable to hand over value. Also fix the indenting issue in this patch.
      
      arch/arm/cpu/armv8/imx8/fuse.c: In function ‘fuse_sense’:
      arch/arm/cpu/armv8/imx8/fuse.c:33:25: warning: passing argument 3 of ‘call_imx_sip_ret2’
      makes pointer from integer without a cast [-Wint-conversion]
                               (unsigned long)val, 0, 0);
                               ^
      In file included from ./arch/arm/include/asm/arch/sys_proto.h:7:0,
                       from arch/arm/cpu/armv8/imx8/fuse.c:13:
      ./arch/arm/include/asm/imx-common/sys_proto.h:94:15: note: expected ‘long unsigned int *’
      but argument is of type ‘long unsigned int’
       unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0, unsigned long *reg1,
           unsigned long reg2, unsigned long reg3);
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      8c9f2dbf
  11. 13 Jul, 2018 1 commit
  12. 11 Jul, 2018 1 commit
    • Frank Li's avatar
      MLK-18406 fastboot support all partition · ca96e0bd
      Frank Li authored
      
      
      uuu can write to any position of mmc
      sdps: boot -f ../mkimage_imx8dv/imx-mkimage/iMX8QX/flash.bin
      
      FB: ucmd setenv fastboot_dev mmc
      FB: ucmd setenv mmcdev ${emmc_dev}
      FB: ucmd mmc dev ${emmc_dev}
      FB: flash -raw2sparse all xx.sdcard
      Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
      ca96e0bd
  13. 06 Jul, 2018 1 commit
  14. 04 Jul, 2018 1 commit
  15. 02 Jul, 2018 1 commit
  16. 22 Jun, 2018 2 commits
    • Ye Li's avatar
      MLK-18639-3 imx8mm_val: Add board codes for iMX8MM DDR4 validation board · 60454847
      Ye Li authored
      
      
      Add SPL/u-boot board codes and DDR4 settings for iMX8MM DDR4 validation board.
      DDR overnight stress test is passed.
      
      Supported modules:
          SD/eMMC, I2C, ENET, Flexspi, UART and USB.
      
      Build config:
          imx8mm_ddr4_val_defconfig
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      60454847
    • Ye Li's avatar
      MLK-18639-1 imx8mm: clock: Add API to enable/disable DDR bypass clock · 323b7377
      Ye Li authored
      
      
      The DRAM PLL generates clock to both DRAM controller & PHY, from 166.7MHz to 800MHz.
      So it can't be used when we need lower DDR frequency.
      The DRAM PHY supports a bypass mode to allow lower frequency operation from DDR-50 to
      DDR-666. In this mode, the PLL inside PHY is disabled, the PHY clock is provided externally
      as BypassPclk which is generated from dram_alt_clk_root.
      
      We add APIs for this bypass mode, to support frequencies for DDR-100, DDR-250 and DDR-400,
      which are needed when training DDR4.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      323b7377
  17. 14 Jun, 2018 2 commits
  18. 13 Jun, 2018 2 commits
    • Peng Fan's avatar
      MLK-18577-5 imx8: update soc code to support uboot in XEN VM · 533087bc
      Peng Fan authored
      
      
      Update SOC code to support U-Boot in a XEN VM. Currently
      we only support to boot android using uboot in a VM,
      so there is hardcode that using MMC1_BOOT boot.
      
      There are a few small fixes included.
      
      For the mmu configuration, the mem map is used from xen
      guest VM and our iomem space in vm cfg file.
      
      The VM use a different MU, so use a wrap for SC_IPC_CH.
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      533087bc
    • Peng Fan's avatar
      MLK-18577-3 armv8: xen: add console write hypercall · 8836c310
      Peng Fan authored
      
      
      Introduce console write hypercall to let Uboot could directly
      output with xen console, this needs CONFIG_VERBOSE_DEBUG
      enabled in xen.
      
      Because input is not a must requirement in android VM,
      and develop pvconsole needs more efforts, so let's use
      this hypercall first.
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      8836c310
  19. 30 May, 2018 1 commit
  20. 24 May, 2018 1 commit
    • Ye Li's avatar
      MLK-18393 imx8: Check the eDMA channels and update DTB · 9f68681c
      Ye Li authored
      
      
      Since M4 will arrange some eDMA channels to its partition, the A core
      can't use them. We have to remove these eDMA channels from DTB dynamically.
      
      Different like other resources, disabling the eDMA channels require to modify
      the edma nodes by removing relevant registers, interrupts configurations, and
      adjust dma channels number.
      
      This patch searches the edma nodes from kernel DTB, checks the channels by
      binding their registers base address with their resource IDs. Then update
      the reg, interrupts, interrupt-names and dma-channels properties.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      Acked-by : Robin Gong <yibin.gong@nxp.com>
      9f68681c
  21. 22 May, 2018 1 commit
  22. 18 May, 2018 2 commits
  23. 16 May, 2018 1 commit
  24. 11 May, 2018 1 commit
  25. 10 May, 2018 10 commits
  26. 08 May, 2018 1 commit