Commit 5a1f5400 authored by Julien Viard de Galbert's avatar Julien Viard de Galbert Committed by Patrick Georgi
Browse files

soc/intel/denverton_ns: Enable common code for CPU



Change-Id: Ib215aa17dd20112946b74a1b63ce8a735388873c
Signed-off-by: default avatarJulien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/24927

Reviewed-by: default avatarPhilipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: default avatarbuild bot (Jenkins) <no-reply@coreboot.org>
parent f729cd0b
......@@ -45,6 +45,7 @@ config CPU_SPECIFIC_OPTIONS
select PCR_COMMON_IOSF_1_0
select SMP
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_CPU
# select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
select SOC_INTEL_COMMON_BLOCK_GPIO
......@@ -117,6 +118,10 @@ config CPU_MICROCODE_CBFS_LEN
hex
default 0x0ff80
config CPU_BCLK_MHZ
int
default 100
config SMM_TSEG_SIZE
hex
default 0x200000
......
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