Commit 939cabfa authored by Matt Devillier's avatar Matt Devillier Committed by Patrick Georgi
Browse files

mb/purism/librem_skl: drop SataSpeedLimit restriction



SataSpeedLimit was set to 3Gbps to work around issues which are now
known to be the result of incorrect FSP behavior. Since SataPwrOptEnable
is now set at the SoC level and ensures the SIR registers are correctly
programmed, we can re-enable 6Gbps operation without errors.

Test: build/boot Librem 13v2 with both m.2 and 2.5" SATA drives,
check dmesg for errors.

Change-Id: I3565dc063724ad288ef92361942fcdc14daac17e
Signed-off-by: Matt Devillier's avatarMatt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40909

Reviewed-by: default avatarPaul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Michael Niewöhner
Reviewed-by: default avatarAngel Pons <th3fanbus@gmail.com>
Tested-by: default avatarbuild bot (Jenkins) <no-reply@coreboot.org>
parent 13dee2a9
......@@ -54,7 +54,6 @@ chip soc/intel/skylake
register "SataPortsEnable[2]" = "1"
register "SataPortsDevSlp[0]" = "0"
register "SataPortsDevSlp[2]" = "0"
register "SataSpeedLimit" = "2"
register "EnableAzalia" = "1"
register "DspEnable" = "0"
register "IoBufferOwnership" = "0"
......
......@@ -54,7 +54,6 @@ chip soc/intel/skylake
register "SataPortsEnable[2]" = "1"
register "SataPortsDevSlp[0]" = "0"
register "SataPortsDevSlp[2]" = "0"
register "SataSpeedLimit" = "2"
register "EnableAzalia" = "1"
register "DspEnable" = "0"
register "IoBufferOwnership" = "0"
......
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