Commit 5935ffe6 authored by Guido Gunther's avatar Guido Gunther
Browse files

arm64: dts: imx8mq: Add NWL dsi controller



Add a node for the Northwestlogic MIPI DSI IP core, "disabled" by
default.
Signed-off-by: Guido Gunther's avatarGuido Günther <agx@sigxcpu.org>
parent 1f968c7b
......@@ -807,6 +807,37 @@ sec_jr2: jr@3000 {
};
};
mipi_dsi: mipi_dsi@30a00000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8mq-nwl-dsi";
reg = <0x30a00000 0x300>;
clocks = <&clk IMX8MQ_CLK_DSI_CORE>,
<&clk IMX8MQ_CLK_DSI_AHB>,
<&clk IMX8MQ_CLK_DSI_IPG_DIV>,
<&clk IMX8MQ_CLK_DSI_PHY_REF>;
clock-names = "core", "rx_esc", "tx_esc", "phy_ref";
assigned-clocks = <&clk IMX8MQ_CLK_DSI_AHB>,
<&clk IMX8MQ_CLK_DSI_CORE>,
<&clk IMX8MQ_CLK_DSI_IPG_DIV>;
assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>,
<&clk IMX8MQ_SYS1_PLL_266M>;
assigned-clock-rates = <80000000>,
<266000000>,
<20000000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pgc_mipi>;
resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>,
<&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>,
<&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>,
<&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>;
reset-names = "byte", "dpi", "esc", "pclk";
mux-controls = <&mux 0>;
phys = <&dphy>;
phy-names = "dphy";
status = "disabled";
};
dphy: dphy@30a00300 {
compatible = "fsl,imx8mq-mipi-dphy";
reg = <0x30a00300 0x100>;
......
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