Commit a1742ee8 authored by Abel Vesa's avatar Abel Vesa Committed by Guido Gunther
Browse files

arm64: dts: imx8mq: Init rates and parents configs for clocks



Add the initial configuration for clocks that need default parent and rate
setting. This is based on the vendor tree clock provider parents and rates
configuration except this is doing the setup in dts rather then using clock
consumer API in a clock provider driver.

Note that by adding the initial rate setting for audio_pll1/audio_pll
setting we need to remove it from imx8mq-librem5-devkit.dts
imx8mq-librem5-devkit.dts
Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarDaniel Baluta <daniel.baluta@nxp.com>
parent dca3d204
......@@ -168,11 +168,6 @@ wifi_pwr_en: regulator-wifi-en {
};
};
&clk {
assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_PLL2>;
assigned-clock-rates = <786432000>, <722534400>;
};
&dphy {
status = "okay";
};
......
......@@ -549,6 +549,27 @@ clk: clock-controller@30380000 {
clock-names = "ckil", "osc_25m", "osc_27m",
"clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4";
assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1>,
<&clk IMX8MQ_AUDIO_PLL1>,
<&clk IMX8MQ_AUDIO_PLL2>,
<&clk IMX8MQ_CLK_AHB>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_AUDIO_AHB>,
<&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
<&clk IMX8MQ_CLK_NOC>;
assigned-clock-parents = <0>,
<0>,
<0>,
<&clk IMX8MQ_SYS1_PLL_133M>,
<&clk IMX8MQ_SYS1_PLL_266M>,
<&clk IMX8MQ_SYS2_PLL_500M>,
<&clk IMX8MQ_CLK_27M>,
<&clk IMX8MQ_SYS1_PLL_800M>;
assigned-clock-rates = <593999999>,
<786432000>,
<722534400>;
};
src: reset-controller@30390000 {
......
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