Commit 8633e4f2 authored by Linus Walleij's avatar Linus Walleij Committed by Arnd Bergmann

ARM: dts: fix PCLK name on Gemini and MOXA ART

These platforms provide a clock to their watchdog, in each
case this is the peripheral clock (PCLK), so explicitly
name the clock in the device tree.

Take this opportunity to add the "faraday,ftwdt010"
compatible as fallback to the watchdog IP blocks.

Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent be2f9d36
......@@ -145,11 +145,12 @@
};
watchdog@41000000 {
compatible = "cortina,gemini-watchdog";
compatible = "cortina,gemini-watchdog", "faraday,ftwdt010";
reg = <0x41000000 0x1000>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
resets = <&syscon GEMINI_RESET_WDOG>;
clocks = <&syscon GEMINI_CLK_APB>;
clock-names = "PCLK";
};
uart0: serial@42000000 {
......
......@@ -87,9 +87,10 @@
};
watchdog: watchdog@98500000 {
compatible = "moxa,moxart-watchdog";
compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
reg = <0x98500000 0x10>;
clocks = <&clk_apb>;
clock-names = "PCLK";
};
sdhci: sdhci@98e00000 {
......
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