- Feb 17, 2020
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Guido Gunther authored
This adds initial support for the NWL MIPI DSI Host controller found on i.MX8 SoCs. It adds support for the i.MX8MQ but the same IP can be found on e.g. the i.MX8QXP. It has been tested on the Librem 5 devkit using mxsfb. Signed-off-by: Guido Günther <agx@sigxcpu.org> Co-developed-by: Robert Chiras <robert.chiras@nxp.com> Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Tested-by: Robert Chiras <robert.chiras@nxp.com> Tested-by: Martin Kepplinger <martin.kepplinger@puri.sm>
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Guido Gunther authored
The Northwest Logic MIPI DSI IP core can be found in NXPs i.MX8 SoCs. Signed-off-by: Guido Günther <agx@sigxcpu.org> Tested-by: Robert Chiras <robert.chiras@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org>
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Guido Gunther authored
This fixes compilation on next-20191029
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Guido Gunther authored
This reverts commit b45ce5e0.
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Guido Gunther authored
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Add the initial configuration for clocks that need default parent and rate setting. This is based on the vendor tree clock provider parents and rates configuration except this is doing the setup in dts rather then using clock consumer API in a clock provider driver. Note that by adding the initial rate setting for audio_pll1/audio_pll setting we need to remove it from imx8mq-librem5-devkit.dts imx8mq-librem5-devkit.dts Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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Bit 21 can alter the CTRL2_OUTSTANDING_REQS value right after the eLCDIF is enabled, since it comes up with default value of 1 (this behaviour has been seen on some imx8 platforms). In order to fix this, clear CTRL2_OUTSTANDING_REQS bits before setting its value. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Currently, the enable of the axi clock return status is ignored, causing issues when the enable fails then we try to disable it. Therefore, it is better to check the return status and disable it only when enable succeeded. Also, remove the helper functions around clk_axi, since we can directly use the clk API function for enable/disable the clock. Those functions are already checking for NULL clk and returning 0 if that's the case. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
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The eLCDIF controller has control pin for the external LCD reset pin. Add support for it and assert this pin in enable and de-assert it in disable. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Add new optional property 'max-memory-bandwidth', to limit the maximum bandwidth used by the MXSFB_DRM driver. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Because of stability issues, we may want to limit the maximum bandwidth required by the MXSFB (eLCDIF) driver. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Add mxsfb_atomic_helper_check to signal mode changed when bpp changed. This will trigger the execution of disable/enable on a modeset with different bpp than the current one. Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com> Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Currently, the vblank support is not correctly implemented in MXSFB_DRM driver. The call to drm_vblank_init is made with mode_config.num_crtc which at that time is 0. Because of this, vblank is not activated, so there won't be any vblank event submitted. For example, when running modetest with the '-v' parameter will result in an astronomical refresh rate (10000+ Hz), because of that. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Since version 4 of eLCDIF, there are some registers that can do transformations on the input data, like re-arranging the pixel components. By doing that, we can support more pixel formats. This patch adds support for X/ABGR and RGBX/A. Although, the local alpha is not supported by eLCDIF, the alpha pixel formats were added to the supported pixel formats but it will be ignored. This was necessary since there are systems (like Android) that requires such pixel formats. Also, add support for the following pixel formats: 16 bpp: RG16 ,BG16, XR15, XB15, AR15, AB15 Set the bus format based on input from the user and panel capabilities. Save the bus format in crtc->mode.private_flags, so the bridge can use it. Signed-off-by: Robert Chiras <robert.chiras@nxp.com> Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
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Use BIT(x) and GEN_MASK(h, l) for better representation the inside of various registers. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Some of the registers, like LCDC_CTRL, CTRL2_OUTSTANDING_REQS and CTRL1_RECOVERY_ON_UNDERFLOW needs to be properly cleared/initialized for a better start and stop routine. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Some of the existing registers in this controller are not defined, but also not used. Add them to the register definitions, so that they can be easily used in future improvements or fixes. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Guido Gunther authored
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
This changes the clock tree from to osc_25m 10 12 0 25000000 0 0 50000 video_pll1_ref_sel 1 1 0 25000000 0 0 50000 video_pll1_ref_div 1 1 0 5000000 0 0 50000 video_pll1 1 1 0 593999998 0 0 50000 video_pll1_bypass 1 1 0 593999998 0 0 50000 video_pll1_out 2 2 0 593999998 0 0 50000 dsi_phy_ref 1 1 0 23760000 0 0 50000 Signed-off-by: Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
This enables the panel to turn the backlight on and off. Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Enable LCD panel output by adding nodes for the NWL DSI host controller, the Rocktech panel and the eLCDIF display controller. Signed-off-by: Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
Add a node for the eLCDIF controller, "disabled" by default. Signed-off-by: Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
Add a node for the Northwestlogic MIPI DSI IP core, "disabled" by default. Signed-off-by: Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Support for the vcnl4040 landet a while ago so add it and the corresponding pinmux. The irq is currently unused in the driver so don't configure it yet. Signed-off-by: Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
Otherwis the regulaor turns of vital parts to run the board. Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Co-developed-by: Signed-off-by: Guido Günther <agx@sigxcpu.org> Signed-off-by: Guido Günther <agx@sigxcpu.org>
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Now that there is driver support, describe the accel and gyro sensor parts of the LSM9DS1 IMU. Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
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Guido Gunther authored
This otherwise confuses mesa/drm which picks the wrong output.
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Guido Gunther authored
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Guido Gunther authored
Somewhat based on the defconfig from Boundary Devices BSP.
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Guido Gunther authored
This makes it easier to spot the drm tree in bug reports and will allow to differentiate kernel packages later on.. Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
This is a work around to ensure smooth kernel upgrades with older flash-kernel. Helps https://source.puri.sm/Librem5/linux-next/issues/25 Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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This message prints out on every dvfs transtion and fills the kernel log. Remove it. Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
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Guido Gunther authored
This supports the Librem 5 and it's devkit Signed-off-by: Guido Günther <guido.gunther@puri.sm>
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Stephen Rothwell authored
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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Stephen Rothwell authored
Fixes an #ifdef bug in the patch referred to below that was causing a build error when CONFIG_DEBUG_VM && !CONFIG_CCGROUP_HUGETLB. Fixes: 54999ed8 ("hugetlb: support file_region coalescing again") Signed-off-by: Mina Almasry <almasrymina@google.com> Cc: David Rientjes <rientjes@google.com> Cc: Greg Thelen <gthelen@google.com> Cc: Mike Kravetz <mike.kravetz@oracle.com> Cc: Shakeel Butt <shakeelb@google.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
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