Commit b7f1d132 authored by Guido Gunther's avatar Guido Gunther Committed by Guido Gunther
Browse files

arm64/dts: imx8mq: Add interconnect for DCSS

parent 2860ae98
Pipeline #60876 passed with stage
in 70 minutes
......@@ -1292,6 +1292,7 @@
<&clk IMX8MQ_CLK_27M>;
assigned-clock-rates = <800000000>,
<400000000>;
interconnects = <&noc IMX8MQ_ICM_DCSS &noc IMX8MQ_ICS_DRAM>;
status = "disabled";
dcss_dsi_out: port@0 {
dcss_mipi_dsi: endpoint {
......
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