Commit 02e2da45 authored by Paul Brook's avatar Paul Brook
Browse files

Add common BusState



Implement and use a common device bus state.  The main side-effect is
that creating a bus and attaching it to a parent device are no longer
separate operations.  For legacy code we allow a NULL parent, but that
should go away eventually.

Also tweak creation code to veriry theat a device in on the right bus.
Signed-off-by: default avatarPaul Brook <paul@codesourcery.com>
parent 4856fcff
......@@ -548,7 +548,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
register_savevm("piix4_pm", 0, 1, pm_save, pm_load, s);
s->smbus = i2c_init_bus();
s->smbus = i2c_init_bus(NULL, "i2c");
s->irq = sci_irq;
qemu_register_reset(piix4_reset, 0, s);
......
......@@ -231,7 +231,8 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
s = qemu_mallocz(sizeof(APBState));
/* Ultrasparc PBM main bus */
s->bus = pci_register_bus(pci_apb_set_irq, pci_pbm_map_irq, pic, 0, 32);
s->bus = pci_register_bus(NULL, "pci",
pci_apb_set_irq, pci_pbm_map_irq, pic, 0, 32);
pci_mem_config = cpu_register_io_memory(0, pci_apb_config_read,
pci_apb_config_write, s);
......
......@@ -133,7 +133,8 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
int pci_mem_config, pci_mem_data;
s = qemu_mallocz(sizeof(GrackleState));
s->bus = pci_register_bus(pci_grackle_set_irq, pci_grackle_map_irq,
s->bus = pci_register_bus(NULL, "pci",
pci_grackle_set_irq, pci_grackle_map_irq,
pic, 0, 4);
pci_mem_config = cpu_register_io_memory(0, pci_grackle_config_read,
......
......@@ -1128,7 +1128,8 @@ PCIBus *pci_gt64120_init(qemu_irq *pic)
s = qemu_mallocz(sizeof(GT64120State));
s->pci = qemu_mallocz(sizeof(GT64120PCIState));
s->pci->bus = pci_register_bus(pci_gt64120_set_irq, pci_gt64120_map_irq,
s->pci->bus = pci_register_bus(NULL, "pci",
pci_gt64120_set_irq, pci_gt64120_map_irq,
pic, 144, 4);
s->ISD_handle = cpu_register_io_memory(0, gt64120_read, gt64120_write, s);
d = pci_register_device(s->pci->bus, "GT64120 PCI Bus", sizeof(PCIDevice),
......
......@@ -11,6 +11,7 @@
struct i2c_bus
{
BusState qbus;
i2c_slave *current_dev;
i2c_slave *dev;
int saved_address;
......@@ -39,11 +40,12 @@ static int i2c_bus_load(QEMUFile *f, void *opaque, int version_id)
}
/* Create a new I2C bus. */
i2c_bus *i2c_init_bus(void)
i2c_bus *i2c_init_bus(DeviceState *parent, const char *name)
{
i2c_bus *bus;
bus = (i2c_bus *)qemu_mallocz(sizeof(i2c_bus));
bus = FROM_QBUS(i2c_bus, qbus_create(BUS_TYPE_I2C, sizeof(i2c_bus),
parent, name));
register_savevm("i2c_bus", -1, 1, i2c_bus_save, i2c_bus_load, bus);
return bus;
}
......@@ -63,20 +65,22 @@ int i2c_bus_busy(i2c_bus *bus)
/* TODO: Make this handle multiple masters. */
int i2c_start_transfer(i2c_bus *bus, int address, int recv)
{
i2c_slave *dev;
DeviceState *qdev;
i2c_slave *slave = NULL;
for (dev = bus->dev; dev; dev = dev->next) {
if (dev->address == address)
LIST_FOREACH(qdev, &bus->qbus.children, sibling) {
slave = I2C_SLAVE_FROM_QDEV(qdev);
if (slave->address == address)
break;
}
if (!dev)
if (!slave)
return 1;
/* If the bus is already busy, assume this is a repeated
start condition. */
bus->current_dev = dev;
dev->info->event(dev, recv ? I2C_START_RECV : I2C_START_SEND);
bus->current_dev = slave;
slave->info->event(slave, recv ? I2C_START_RECV : I2C_START_SEND);
return 0;
}
......@@ -130,23 +134,20 @@ void i2c_slave_save(QEMUFile *f, i2c_slave *dev)
void i2c_slave_load(QEMUFile *f, i2c_slave *dev)
{
i2c_bus *bus;
bus = qdev_get_bus(&dev->qdev);
bus = FROM_QBUS(i2c_bus, qdev_get_parent_bus(&dev->qdev));
dev->address = qemu_get_byte(f);
if (bus->saved_address == dev->address) {
bus->current_dev = dev;
}
}
static void i2c_slave_qdev_init(DeviceState *dev, void *opaque)
static void i2c_slave_qdev_init(DeviceState *dev, DeviceInfo *base)
{
I2CSlaveInfo *info = opaque;
I2CSlaveInfo *info = container_of(base, I2CSlaveInfo, qdev);
i2c_slave *s = I2C_SLAVE_FROM_QDEV(dev);
s->info = info;
s->bus = qdev_get_bus(dev);
s->address = qdev_get_prop_int(dev, "address", 0);
s->next = s->bus->dev;
s->bus->dev = s;
info->init(s);
}
......@@ -154,14 +155,16 @@ static void i2c_slave_qdev_init(DeviceState *dev, void *opaque)
void i2c_register_slave(const char *name, int size, I2CSlaveInfo *info)
{
assert(size >= sizeof(i2c_slave));
qdev_register(name, size, i2c_slave_qdev_init, info);
info->qdev.init = i2c_slave_qdev_init;
info->qdev.bus_type = BUS_TYPE_I2C;
qdev_register(name, size, &info->qdev);
}
DeviceState *i2c_create_slave(i2c_bus *bus, const char *name, int addr)
{
DeviceState *dev;
dev = qdev_create(bus, name);
dev = qdev_create(&bus->qbus, name);
qdev_set_prop_int(dev, "address", addr);
qdev_init(dev);
return dev;
......
......@@ -25,6 +25,8 @@ typedef void (*i2c_event_cb)(i2c_slave *s, enum i2c_event event);
typedef void (*i2c_slave_initfn)(i2c_slave *dev);
typedef struct {
DeviceInfo qdev;
/* Callbacks provided by the device. */
i2c_slave_initfn init;
i2c_event_cb event;
......@@ -39,11 +41,9 @@ struct i2c_slave
/* Remaining fields for internal use by the I2C code. */
int address;
void *next;
i2c_bus *bus;
};
i2c_bus *i2c_init_bus(void);
i2c_bus *i2c_init_bus(DeviceState *parent, const char *name);
void i2c_set_slave_address(i2c_slave *dev, int address);
int i2c_bus_busy(i2c_bus *bus);
int i2c_start_transfer(i2c_bus *bus, int address, int recv);
......
......@@ -907,7 +907,7 @@ void mips_malta_init (ram_addr_t ram_size,
for (i = 0; i < 8; i++) {
/* TODO: Populate SPD eeprom data. */
DeviceState *eeprom;
eeprom = qdev_create(smbus, "smbus-eeprom");
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
qdev_set_prop_int(eeprom, "address", 0x50 + i);
qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
qdev_init(eeprom);
......
......@@ -431,7 +431,7 @@ static i2c_interface *musicpal_audio_init(qemu_irq irq)
s->irq = irq;
i2c = qemu_mallocz(sizeof(i2c_interface));
i2c->bus = i2c_init_bus();
i2c->bus = i2c_init_bus(NULL, "i2c");
i2c->current_addr = -1;
s->wm = i2c_create_slave(i2c->bus, "wm8750", MP_WM_ADDR);
......
......@@ -433,7 +433,7 @@ struct omap_i2c_s *omap_i2c_init(target_phys_addr_t base,
s->irq = irq;
s->drq[0] = dma[0];
s->drq[1] = dma[1];
s->bus = i2c_init_bus();
s->bus = i2c_init_bus(NULL, "i2c");
omap_i2c_reset(s);
iomemtype = cpu_register_io_memory(0, omap_i2c_readfn,
......@@ -454,7 +454,7 @@ struct omap_i2c_s *omap2_i2c_init(struct omap_target_agent_s *ta,
s->irq = irq;
s->drq[0] = dma[0];
s->drq[1] = dma[1];
s->bus = i2c_init_bus();
s->bus = i2c_init_bus(NULL, "i2c");
omap_i2c_reset(s);
iomemtype = l4_register_io_memory(0, omap_i2c_readfn,
......
......@@ -1105,7 +1105,7 @@ static void pc_init1(ram_addr_t ram_size,
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
for (i = 0; i < 8; i++) {
DeviceState *eeprom;
eeprom = qdev_create(smbus, "smbus-eeprom");
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
qdev_set_prop_int(eeprom, "address", 0x50 + i);
qdev_set_prop_ptr(eeprom, "data", eeprom_buf + (i * 256));
qdev_init(eeprom);
......
......@@ -30,6 +30,7 @@
//#define DEBUG_PCI
struct PCIBus {
BusState qbus;
int bus_num;
int devfn_min;
pci_set_irq_fn set_irq;
......@@ -87,13 +88,16 @@ static int pcibus_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
qemu_irq *pic, int devfn_min, int nirq)
{
PCIBus *bus;
static int nbus = 0;
bus = qemu_mallocz(sizeof(PCIBus) + (nirq * sizeof(int)));
bus = FROM_QBUS(PCIBus, qbus_create(BUS_TYPE_PCI,
sizeof(PCIBus) + (nirq * sizeof(int)),
parent, name));
bus->set_irq = set_irq;
bus->map_irq = map_irq;
bus->irq_opaque = pic;
......@@ -320,7 +324,7 @@ int pci_unregister_device(PCIDevice *pci_dev)
qemu_free_irqs(pci_dev->irq);
pci_irq_index--;
pci_dev->bus->devices[pci_dev->devfn] = NULL;
qemu_free(pci_dev);
qdev_free(&pci_dev->qdev);
return 0;
}
......@@ -821,7 +825,7 @@ PCIDevice *pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn,
for (i = 0; pci_nic_models[i]; i++) {
if (strcmp(nd->model, pci_nic_models[i]) == 0) {
dev = qdev_create(bus, pci_nic_names[i]);
dev = qdev_create(&bus->qbus, pci_nic_names[i]);
qdev_set_prop_int(dev, "devfn", devfn);
qdev_set_netdev(dev, nd);
qdev_init(dev);
......@@ -901,32 +905,43 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
return s->bus;
}
static void pci_qdev_init(DeviceState *qdev, void *opaque)
typedef struct {
DeviceInfo qdev;
pci_qdev_initfn init;
} PCIDeviceInfo;
static void pci_qdev_init(DeviceState *qdev, DeviceInfo *base)
{
PCIDevice *pci_dev = (PCIDevice *)qdev;
pci_qdev_initfn init;
PCIDeviceInfo *info = container_of(base, PCIDeviceInfo, qdev);
PCIBus *bus;
int devfn;
init = opaque;
bus = qdev_get_bus(qdev);
bus = FROM_QBUS(PCIBus, qdev_get_parent_bus(qdev));
devfn = qdev_get_prop_int(qdev, "devfn", -1);
pci_dev = do_pci_register_device(pci_dev, bus, "FIXME", devfn,
NULL, NULL);//FIXME:config_read, config_write);
assert(pci_dev);
init(pci_dev);
info->init(pci_dev);
}
void pci_qdev_register(const char *name, int size, pci_qdev_initfn init)
{
qdev_register(name, size, pci_qdev_init, init);
PCIDeviceInfo *info;
info = qemu_mallocz(sizeof(*info));
info->init = init;
info->qdev.init = pci_qdev_init;
info->qdev.bus_type = BUS_TYPE_PCI;
qdev_register(name, size, &info->qdev);
}
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name)
{
DeviceState *dev;
dev = qdev_create(bus, name);
dev = qdev_create(&bus->qbus, name);
qdev_set_prop_int(dev, "devfn", devfn);
qdev_init(dev);
......
......@@ -183,7 +183,8 @@ int pci_device_load(PCIDevice *s, QEMUFile *f);
typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level);
typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
PCIBus *pci_register_bus(DeviceState *parent, const char *name,
pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
qemu_irq *pic, int devfn_min, int nirq);
PCIDevice *pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn,
......
......@@ -176,7 +176,8 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
I440FXState *s;
s = qemu_mallocz(sizeof(I440FXState));
b = pci_register_bus(piix3_set_irq, pci_slot_get_pirq, pic, 0, 4);
b = pci_register_bus(NULL, "pci",
piix3_set_irq, pci_slot_get_pirq, pic, 0, 4);
s->bus = b;
register_ioport_write(0xcf8, 4, 4, i440fx_addr_writel, s);
......
......@@ -297,8 +297,7 @@ static void pl022_init(SysBusDevice *dev)
pl022_writefn, s);
sysbus_init_mmio(dev, 0x1000, iomemtype);
sysbus_init_irq(dev, &s->irq);
s->ssi = ssi_create_bus();
qdev_attach_child_bus(&dev->qdev, "ssi", s->ssi);
s->ssi = ssi_create_bus(&dev->qdev, "ssi");
pl022_reset(s);
register_savevm("pl022_ssp", -1, 1, pl022_save, pl022_load, s);
}
......
......@@ -370,7 +370,8 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
controller = qemu_mallocz(sizeof(PPC4xxPCIState));
controller->pci_state.bus = pci_register_bus(ppc4xx_pci_set_irq,
controller->pci_state.bus = pci_register_bus(NULL, "pci",
ppc4xx_pci_set_irq,
ppc4xx_pci_map_irq,
pci_irqs, 0, 4);
......
......@@ -317,7 +317,8 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
controller = qemu_mallocz(sizeof(PPCE500PCIState));
controller->pci_state.bus = pci_register_bus(mpc85xx_pci_set_irq,
controller->pci_state.bus = pci_register_bus(NULL, "pci",
mpc85xx_pci_set_irq,
mpc85xx_pci_map_irq,
pci_irqs, 0x88, 4);
d = pci_register_device(controller->pci_state.bus,
......
......@@ -136,7 +136,8 @@ PCIBus *pci_prep_init(qemu_irq *pic)
int PPC_io_memory;
s = qemu_mallocz(sizeof(PREPPCIState));
s->bus = pci_register_bus(prep_set_irq, prep_map_irq, pic, 0, 4);
s->bus = pci_register_bus(NULL, "pci",
prep_set_irq, prep_map_irq, pic, 0, 4);
register_ioport_write(0xcf8, 4, 4, pci_prep_addr_writel, s);
register_ioport_read(0xcf8, 4, 4, pci_prep_addr_readl, s);
......
......@@ -863,8 +863,7 @@ static void pxa2xx_ssp_init(SysBusDevice *dev)
register_savevm("pxa2xx_ssp", -1, 0,
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
s->bus = ssi_create_bus();
qdev_attach_child_bus(&dev->qdev, "ssi", s->bus);
s->bus = ssi_create_bus(&dev->qdev, "ssi");
}
/* Real-Time Clock */
......@@ -1500,12 +1499,12 @@ PXA2xxI2CState *pxa2xx_i2c_init(target_phys_addr_t base,
PXA2xxI2CState *s = qemu_mallocz(sizeof(PXA2xxI2CState));
/* FIXME: Should the slave device really be on a separate bus? */
dev = i2c_create_slave(i2c_init_bus(), "pxa2xx-i2c-slave", 0);
dev = i2c_create_slave(i2c_init_bus(NULL, "dummy"), "pxa2xx-i2c-slave", 0);
s->slave = FROM_I2C_SLAVE(PXA2xxI2CSlaveState, I2C_SLAVE_FROM_QDEV(dev));
s->slave->host = s;
s->irq = irq;
s->bus = i2c_init_bus();
s->bus = i2c_init_bus(NULL, "i2c");
s->offset = base - (base & (~region_size) & TARGET_PAGE_MASK);
iomemtype = cpu_register_io_memory(0, pxa2xx_i2c_readfn,
......@@ -2117,7 +2116,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
DeviceState *dev;
dev = sysbus_create_simple("pxa2xx-ssp", pxa27x_ssp[i].io_base,
s->pic[pxa27x_ssp[i].irqn]);
s->ssp[i] = qdev_get_child_bus(dev, "ssi");
s->ssp[i] = (SSIBus *)qdev_get_child_bus(dev, "ssi");
}
if (usb_enabled) {
......@@ -2229,7 +2228,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
DeviceState *dev;
dev = sysbus_create_simple("pxa2xx-ssp", pxa255_ssp[i].io_base,
s->pic[pxa255_ssp[i].irqn]);
s->ssp[i] = qdev_get_child_bus(dev, "ssi");
s->ssp[i] = (SSIBus *)qdev_get_child_bus(dev, "ssi");
}
if (usb_enabled) {
......
......@@ -41,23 +41,18 @@ struct DeviceProperty {
struct DeviceType {
const char *name;
qdev_initfn init;
void *opaque;
DeviceInfo *info;
int size;
DeviceType *next;
};
struct ChildBusList {
const char *name;
void *ptr;
ChildBusList *next;
};
/* This is a nasty hack to allow passing a NULL bus to qdev_create. */
BusState *main_system_bus;
static DeviceType *device_type_list;
/* Register a new device type. */
DeviceType *qdev_register(const char *name, int size, qdev_initfn init,
void *opaque)
void qdev_register(const char *name, int size, DeviceInfo *info)
{
DeviceType *t;
......@@ -68,16 +63,13 @@ DeviceType *qdev_register(const char *name, int size, qdev_initfn init,
device_type_list = t;
t->name = qemu_strdup(name);
t->size = size;
t->init = init;
t->opaque = opaque;
return t;
t->info = info;
}
/* Create a new device. This only initializes the device state structure
and allows properties to be set. qdev_init should be called to
initialize the actual device emulation. */
DeviceState *qdev_create(void *bus, const char *name)
DeviceState *qdev_create(BusState *bus, const char *name)
{
DeviceType *t;
DeviceState *dev;
......@@ -88,14 +80,28 @@ DeviceState *qdev_create(void *bus, const char *name)
}
}
if (!t) {
fprintf(stderr, "Unknown device '%s'\n", name);
exit(1);
hw_error("Unknown device '%s'\n", name);
}
dev = qemu_mallocz(t->size);
dev->name = name;
dev->type = t;
dev->bus = bus;
if (!bus) {
/* ???: This assumes system busses have no additional state. */
if (!main_system_bus) {
main_system_bus = qbus_create(BUS_TYPE_SYSTEM, sizeof(BusState),
NULL, "main-system-bus");
}
bus = main_system_bus;
}
if (t->info->bus_type != bus->type) {
/* TODO: Print bus type names. */
hw_error("Device '%s' on wrong bus type (%d/%d)", name,
t->info->bus_type, bus->type);
}
dev->parent_bus = bus;
LIST_INSERT_HEAD(&bus->children, dev, sibling);
return dev;
}
......@@ -104,7 +110,14 @@ DeviceState *qdev_create(void *bus, const char *name)
calling this function. */
void qdev_init(DeviceState *dev)
{
dev->type->init(dev, dev->type->opaque);
dev->type->info->init(dev, dev->type->info);
}
/* Unlink device from bus and free the structure. */
void qdev_free(DeviceState *dev)
{
LIST_REMOVE(dev, sibling);
free(dev);
}
static DeviceProperty *create_prop(DeviceState *dev, const char *name)
......@@ -169,9 +182,9 @@ CharDriverState *qdev_init_chardev(DeviceState *dev)
}
}
void *qdev_get_bus(DeviceState *dev)
BusState *qdev_get_parent_bus(DeviceState *dev)
{
return dev->bus;
return dev->parent_bus;
}
static DeviceProperty *find_prop(DeviceState *dev, const char *name)
......@@ -267,30 +280,18 @@ BlockDriverState *qdev_init_bdrv(DeviceState *dev, BlockInterfaceType type)
return drives_table[index].bdrv;
}
void *qdev_get_child_bus(DeviceState *dev, const char *name)
BusState *qdev_get_child_bus(DeviceState *dev, const char *name)
{
ChildBusList *bus;
BusState *bus;
for (bus = dev->child_bus; bus; bus = bus->next) {
LIST_FOREACH(bus, &dev->child_bus, sibling) {
if (strcmp(name, bus->name) == 0) {
return bus->ptr;
return bus;
}
}
return NULL;
}
void qdev_attach_child_bus(DeviceState *dev, const char *name, void *bus)
{
ChildBusList *p;
assert(!qdev_get_child_bus(dev, name));
p = qemu_mallocz(sizeof(*p));
p->name = qemu_strdup(name);
p->ptr = bus;
p->next = dev->child_bus;
dev->child_bus = p;
}
static int next_scsi_bus;
/* Create a scsi bus, and attach devices to it. */
......@@ -309,3 +310,19 @@ void scsi_bus_new(DeviceState *host, SCSIAttachFn attach)
attach(host, drives_table[index].bdrv, unit);
}
}
BusState *qbus_create(BusType type, size_t size,
DeviceState *parent, const char *name)
{
BusState *bus;
bus = qemu_mallocz(size);
bus->type = type;
bus->parent = parent;
bus->name = qemu_strdup(name);
LIST_INIT(&bus->children);
if (parent) {
LIST_INSERT_HEAD(&parent->child_bus, bus, sibling);
}
return bus;
}
......@@ -2,20 +2,20 @@
#define QDEV_H
#include "hw.h"
#include "sys-queue.h"
typedef struct DeviceType DeviceType;
typedef struct DeviceProperty DeviceProperty;
typedef struct ChildBusList ChildBusList;
typedef struct BusState BusState;
/* This structure should not be accessed directly. We declare it here
so that it can be embedded in individual device state structures. */
struct DeviceState
{
struct DeviceState {
const char *name;
DeviceType *type;
void *bus;
BusState *parent_bus;
DeviceProperty *props;
int num_irq_sink;
qemu_irq *irq_sink;
......@@ -23,14 +23,32 @@ struct DeviceState
qemu_irq *gpio_out;
int num_gpio_in;
qemu_irq *gpio_in;
ChildBusList *child_bus;
LIST_HEAD(, BusState) child_bus;
NICInfo *nd;
LIST_ENTRY(DeviceState) sibling;
};
typedef enum {
BUS_TYPE_SYSTEM,
BUS_TYPE_PCI,
BUS_TYPE_SCSI,
BUS_TYPE_I2C,
BUS_TYPE_SSI
} BusType;
struct BusState {
DeviceState *parent;
const char *name;
BusType type;
LIST_