Commit 356c7ff4 authored by Naphtali Sprei's avatar Naphtali Sprei Committed by Anthony Liguori

fix for bad macaddr of e1000 in Windows 2003 server with original MS driver

The sequence of reading from eeprom is "offset by one" moved because of a false
detection of a clock cycle after an eeprom reset. Keeping the last clock value
after a reset keeps it in sync.
Signed-off-by: default avatarNaphtali Sprei <nsprei@redhat.com>
Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parent f3519986
......@@ -261,6 +261,11 @@ set_eecd(E1000State *s, int index, uint32_t val)
}
if (!(val & E1000_EECD_CS)) { // rising, no CS (EEPROM reset)
memset(&s->eecd_state, 0, sizeof s->eecd_state);
/*
* restore old_eecd's E1000_EECD_SK (known to be on)
* to avoid false detection of a clock edge
*/
s->eecd_state.old_eecd = E1000_EECD_SK;
return;
}
s->eecd_state.val_in <<= 1;
......
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