Commit bc51c5c9 authored by bellard's avatar bellard
Browse files

initial x86-64 host support (Gwenole Beauchesne)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@670 c046a42c-6fe2-441c-8c8c-71466251a162
parent 50691463
......@@ -18,6 +18,7 @@ version 0.5.3:
- generic removable device support
- support of CD-ROM change
- multiple network interface support
- initial x86-64 host support (Gwenole Beauchesne)
version 0.5.2:
......
......@@ -80,6 +80,11 @@ LDFLAGS+=-Wl,-shared
endif
endif
ifeq ($(ARCH),amd64)
OP_CFLAGS=$(CFLAGS) -falign-functions=0
LDFLAGS+=-Wl,-T,$(SRC_PATH)/amd64.ld
endif
ifeq ($(ARCH),ppc)
OP_CFLAGS=$(CFLAGS)
LDFLAGS+=-Wl,-T,$(SRC_PATH)/ppc.ld
......@@ -174,6 +179,12 @@ endif
# NOTE: the disassembler code is only needed for debugging
LIBOBJS+=disas.o
ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386)
USE_I386_DIS=y
endif
ifeq ($(findstring amd64, $(TARGET_ARCH) $(ARCH)),amd64)
USE_I386_DIS=y
endif
ifdef USE_I386_DIS
LIBOBJS+=i386-dis.o
endif
ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha)
......
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......@@ -43,7 +43,7 @@
#endif /* !HAVE_BYTESWAP_H */
#if defined(__alpha__) || defined (__ia64__)
#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
#define HOST_LONG_BITS 64
#else
#define HOST_LONG_BITS 32
......
......@@ -59,6 +59,9 @@ case "$cpu" in
m68k)
cpu="m68k"
;;
x86_64|amd64)
cpu="amd64"
;;
*)
cpu="unknown"
;;
......@@ -253,6 +256,9 @@ echo "LDFLAGS=$LDFLAGS" >> $config_mak
if test "$cpu" = "i386" ; then
echo "ARCH=i386" >> $config_mak
echo "#define HOST_I386 1" >> $config_h
elif test "$cpu" = "amd64" ; then
echo "ARCH=amd64" >> $config_mak
echo "#define HOST_AMD64 1" >> $config_h
elif test "$cpu" = "armv4l" ; then
echo "ARCH=arm" >> $config_mak
echo "#define HOST_ARM 1" >> $config_h
......
......@@ -785,6 +785,21 @@ int cpu_signal_handler(int host_signum, struct siginfo *info,
&uc->uc_sigmask, puc);
}
#elif defined(__x86_64__)
int cpu_signal_handler(int host_signum, struct siginfo *info,
void *puc)
{
struct ucontext *uc = puc;
unsigned long pc;
pc = uc->uc_mcontext.gregs[REG_RIP];
return handle_cpu_signal(pc, (unsigned long)info->si_addr,
uc->uc_mcontext.gregs[REG_TRAPNO] == 0xe ?
(uc->uc_mcontext.gregs[REG_ERR] >> 1) & 1 : 0,
&uc->uc_sigmask, puc);
}
#elif defined(__powerpc)
int cpu_signal_handler(int host_signum, struct siginfo *info,
......
......@@ -16,7 +16,9 @@
#define PARAMS(x) x
typedef void *PTR;
typedef uint64_t bfd_vma;
typedef int64_t bfd_signed_vma;
typedef uint8_t bfd_byte;
#define sprintf_vma(s,x) sprintf (s, "%0" PRIx64, x)
enum bfd_flavour {
bfd_target_unknown_flavour,
......@@ -105,6 +107,9 @@ enum bfd_architecture
bfd_arch_i386, /* Intel 386 */
#define bfd_mach_i386_i386 0
#define bfd_mach_i386_i8086 1
#define bfd_mach_i386_i386_intel_syntax 2
#define bfd_mach_x86_64 3
#define bfd_mach_x86_64_intel_syntax 4
bfd_arch_we32k, /* AT&T WE32xxx */
bfd_arch_tahoe, /* CCI/Harris Tahoe */
bfd_arch_i860, /* Intel 860 */
......
......@@ -140,9 +140,12 @@ void disas(FILE *out, void *code, unsigned long size, int is_host, int flags)
#else
disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#ifdef __i386__
#if defined(__i386__)
disasm_info.mach = bfd_mach_i386_i386;
print_insn = print_insn_i386;
#elif defined(__x86_64__)
disasm_info.mach = bfd_mach_x86_64;
print_insn = print_insn_i386;
#elif defined(__powerpc__)
print_insn = print_insn_ppc;
#elif defined(__alpha__)
......
......@@ -68,6 +68,14 @@ extern int printf(const char *, ...);
#define AREG2 "esi"
#define AREG3 "edi"
#endif
#ifdef __x86_64__
#define AREG0 "rbp"
#define AREG1 "rbx"
#define AREG2 "r12"
#define AREG3 "r13"
#define AREG4 "r14"
#define AREG5 "r15"
#endif
#ifdef __powerpc__
#define AREG0 "r27"
#define AREG1 "r24"
......@@ -188,6 +196,9 @@ extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
#ifdef __i386__
#define EXIT_TB() asm volatile ("ret")
#endif
#ifdef __x86_64__
#define EXIT_TB() asm volatile ("ret")
#endif
#ifdef __powerpc__
#define EXIT_TB() asm volatile ("blr")
#endif
......
......@@ -37,6 +37,13 @@
#define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
#undef ELF_USES_RELOCA
#elif defined(HOST_AMD64)
#define ELF_CLASS ELFCLASS64
#define ELF_ARCH EM_X86_64
#define elf_check_arch(x) ((x) == EM_X86_64)
#define ELF_USES_RELOCA
#elif defined(HOST_PPC)
#define ELF_CLASS ELFCLASS32
......@@ -446,6 +453,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
start_offset = offset;
switch(ELF_ARCH) {
case EM_386:
case EM_X86_64:
{
int len;
len = p_end - p_start;
......@@ -766,6 +774,41 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
}
}
}
#elif defined(HOST_AMD64)
{
char name[256];
int type;
int addend;
for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
if (rel->r_offset >= start_offset &&
rel->r_offset < start_offset + copy_size) {
sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
if (strstart(sym_name, "__op_param", &p)) {
snprintf(name, sizeof(name), "param%s", p);
} else {
snprintf(name, sizeof(name), "(long)(&%s)", sym_name);
}
type = ELF32_R_TYPE(rel->r_info);
addend = rel->r_addend;
switch(type) {
case R_X86_64_32:
fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (uint32_t)%s + %d;\n",
rel->r_offset - start_offset, name, addend);
break;
case R_X86_64_32S:
fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (int32_t)%s + %d;\n",
rel->r_offset - start_offset, name, addend);
break;
case R_X86_64_PC32:
fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %d) + %d;\n",
rel->r_offset - start_offset, name, rel->r_offset - start_offset, addend);
break;
default:
error("unsupported AMD64 relocation (%d)", type);
}
}
}
}
#elif defined(HOST_PPC)
{
char name[256];
......
......@@ -27,6 +27,12 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
}
#endif
#ifdef __x86_64__
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
}
#endif
#ifdef __s390__
static inline void flush_icache_range(unsigned long start, unsigned long stop)
{
......
......@@ -400,6 +400,20 @@ static inline int testandset (int *p)
}
#endif
#ifdef __x86_64__
static inline int testandset (int *p)
{
char ret;
int readval;
__asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
: "=q" (ret), "=m" (*p), "=a" (readval)
: "r" (1), "m" (*p), "a" (0)
: "memory");
return ret;
}
#endif
#ifdef __s390__
static inline int testandset (int *p)
{
......
This diff is collapsed.
......@@ -188,7 +188,7 @@ long target_mmap(unsigned long start, unsigned long len, int prot,
host_start = start & host_page_mask;
if (!(flags & MAP_FIXED)) {
#if defined(__alpha__) || defined(__sparc__)
#if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__)
/* tell the kenel to search at the same place as i386 */
if (host_start == 0)
host_start = 0x40000000;
......
......@@ -207,7 +207,7 @@ type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
#define __NR_sys_getdents64 __NR_getdents64
#define __NR_sys_rt_sigqueueinfo __NR_rt_sigqueueinfo
#if defined(__alpha__) || defined (__ia64__)
#if defined(__alpha__) || defined (__ia64__) || defined(__x86_64__)
#define __NR__llseek __NR_lseek
#endif
......
......@@ -252,7 +252,7 @@ enum {
CC_OP_NB,
};
#ifdef __i386__
#if defined(__i386__) || defined(__x86_64__)
#define USE_X86LDOUBLE
#endif
......
......@@ -1802,14 +1802,14 @@ void helper_invlpg(unsigned int addr)
}
/* rdtsc */
#ifndef __i386__
#if !defined(__i386__) && !defined(__x86_64__)
uint64_t emu_time;
#endif
void helper_rdtsc(void)
{
uint64_t val;
#ifdef __i386__
#if defined(__i386__) || defined(__x86_64__)
asm("rdtsc" : "=A" (val));
#else
/* better than nothing: the time increases */
......
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