1. 12 Jul, 2009 10 commits
    • Blue Swirl's avatar
      Sparc32: use the OpenFirmware name for ecc · 798b721e
      Blue Swirl authored
      
      
      Signed-off-by: default avatarBlue Swirl <blauwirbel@gmail.com>
      798b721e
    • Aurelien Jarno's avatar
      344b983d
    • Paul Brook's avatar
      Fix MIPS SC · feeb3b6a
      Paul Brook authored
      
      
      Fix botched merge of op_ldst_sc calls to match actual implementation.
      Thanks to Aurelien Jarno for diagnosing this.
      
      Signed-off-by: default avatarPaul Brook <paul@codesourcery.com>
      feeb3b6a
    • Blue Swirl's avatar
      Sparc64: convert ebus to qdev · 53e3c4f9
      Blue Swirl authored
      
      
      Signed-off-by: default avatarBlue Swirl <blauwirbel@gmail.com>
      53e3c4f9
    • Igor Kovalenko's avatar
      sparc64: trap handling corrections · 5210977a
      Igor Kovalenko authored
      On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
      > On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
      >> Good trap handling is required to process interrupts.
      >>  This patch fixes the following:
      >>
      >>  - sparc64 has no wim register
      >>  - sparc64 has no psret register, use IE bit of pstate
      >>   extract IE checking code to cpu_interrupts_enabled
      >>  - alternate globals are not available if cpu has GL feature
      >>   in this case bit AG of pstate is constant zero
      >>  - write to pstate must actually write pstate
      >>   even if cpu has GL feature
      >>
      >>  Also timer interrupt is handled using do_interrupt.
      >
      > A bit too much for one patch. Please also remove the code instead of
      > commenting out.
      
      I now excluded timer interrupt related part.
      To my mind other changes are essentially tied together.
      
      > PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.
      
      Fixed, please find attached the updated version.
      
      --
      Kind regards,
      Igor V. Kovalenko
      5210977a
    • Blue Swirl's avatar
      Sparc32: convert eccmemctl to qdev · 49e66373
      Blue Swirl authored
      
      
      Signed-off-by: default avatarBlue Swirl <blauwirbel@gmail.com>
      49e66373
    • Igor Kovalenko's avatar
      sparc64: fix helper_st_asi little endian case typo · 5b0f0bec
      Igor Kovalenko authored
      
      
      On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<sdbrady@ntlworld.com> wrote:
      > On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote:
      >> It is clear that intention is to byte-swap value to be written, not
      >> the target address.
      >
      > @@ -1949,13 +1949,13 @@ void helper_st_asi(target_ulong addr, ta
      >     case 0x89: // Secondary LE
      >         switch(size) {
      >         case 2:
      > -            addr = bswap16(addr);
      > +            addr = bswap16(val);
      >             ^^^^
      > Shouldn't that be 'val = bswap16(val)' (and likewise for the 32-bit and
      > 64-bit cases)?  Also needs a 'signed-off-by:'...
      >
      > Cheers,
      > --
      > Stuart Brady
      >
      
      Thanks, that part I did not runtime-tested.
      Not sure if those asi stores are of any use for user-mode emulator.
      
      Please find attached the corrected version.
      
      Signed-off-by: default avatar <igor.v.kovalenko@gmail.com>
      
      --
      Kind regards,
      Igor V. Kovalenko
      5b0f0bec
    • Igor Kovalenko's avatar
      sparc64: really initialize irq · 7d55273f
      Igor Kovalenko authored
      
      
      Allocate irq just before passing it to pci bridge initialization
      and actually use it to initialize pci bridge.
      
      Signed-off-by: default avatar <igor.v.kovalenko@gmail.com>
      
      --
      Kind regards,
      Igor V. Kovalenko
      7d55273f
    • Igor Kovalenko's avatar
      sparc64: unify mmu tag matching code · 536ba015
      Igor Kovalenko authored
      
      
      This patch extracts common part of sparc64 tag
      matching code used by IMMU and DMMU lookups.
      
      Signed-off-by: default avatar <igor.v.kovalenko@gmail.com>
      
      --
      Kind regards,
      Igor V. Kovalenko
      536ba015
    • Igor Kovalenko's avatar
      sparc64: mmu bypass mode correction · e8807b14
      Igor Kovalenko authored
      
      
      This Implement physical address truncation in mmu bypass mode.
      IMMU bypass is also active when cpu enters RED_STATE
      
      Signed-off-by: default avatar <igor.v.kovalenko@gmail.com>
      
      --
      Kind regards,
      Igor V. Kovalenko
      e8807b14
  2. 11 Jul, 2009 3 commits
  3. 10 Jul, 2009 16 commits
  4. 09 Jul, 2009 11 commits