mlxsw: Register physical ports as a devlink resource
The switch ASIC has a limited capacity of physical ('flavour physical' in devlink terminology) ports that it can support. While each system is brought up with a different number of ports, this number can be increased via splitting up to the ASIC's limit. Expose physical ports as a devlink resource so that user space will have visibility to the maximum number of ports that can be supported and the current occupancy. In addition, add a "Generic Resources" section in devlink-resource documentation so the different drivers will be aligned by the same resource name when exposing to user space. Signed-off-by:Danielle Ratson <danieller@nvidia.com> Reviewed-by:
Jiri Pirko <jiri@nvidia.com> Signed-off-by:
Ido Schimmel <idosch@nvidia.com> Signed-off-by:
Jakub Kicinski <kuba@kernel.org>
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- Documentation/networking/devlink/devlink-resource.rst 14 additions, 0 deletionsDocumentation/networking/devlink/devlink-resource.rst
- drivers/net/ethernet/mellanox/mlxsw/core.c 67 additions, 10 deletionsdrivers/net/ethernet/mellanox/mlxsw/core.c
- drivers/net/ethernet/mellanox/mlxsw/core.h 5 additions, 0 deletionsdrivers/net/ethernet/mellanox/mlxsw/core.h
- drivers/net/ethernet/mellanox/mlxsw/spectrum.h 1 addition, 1 deletiondrivers/net/ethernet/mellanox/mlxsw/spectrum.h
- include/net/devlink.h 2 additions, 0 deletionsinclude/net/devlink.h
- net/core/devlink.c 4 additions, 0 deletionsnet/core/devlink.c
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