Skip to content
Snippets Groups Projects
Commit b47bd6ea authored by Daniel Jurgens's avatar Daniel Jurgens Committed by David S. Miller
Browse files

{net, ib}/mlx5: Make cache line size determination at runtime. 


ARM 64B cache line systems have L1_CACHE_BYTES set to 128.
cache_line_size() will return the correct size.

Fixes: cf50b5efa2fe('net/mlx5_core/ib: New device capabilities
handling.')
Signed-off-by: default avatarDaniel Jurgens <danielj@mellanox.com>

Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent bf911e98
No related merge requests found
Hide whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment