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Commit c0af19f9 authored by Daniel Baluta's avatar Daniel Baluta Committed by Angus Ainslie (Purism)
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ASoC: fsl_sai: Add support for imx7ulp/imx8mq 


SAI module on imx7ulp/imx8m features 2 new registers (VERID and PARAM)
at the beginning of register address space.

On imx7ulp FIFOs can held up to 16 x 32 bit samples.
On imx8mq FIFOs can held up to 128 x 32 bit samples.

Signed-off-by: default avatarDaniel Baluta <daniel.baluta@nxp.com>
parent f9690ca4
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