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Angus Ainslie
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Eric Kuzmenko
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Evangelos Ribeiro Tzaras
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Francois Techene
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Guido Gunther
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JC Staudt
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Jonathon Hall
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Julian Sparber
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Martin Kepplinger
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Mohammed Sadiq
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Sebastian Krzyszkowiak
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- Dec 11, 2020
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Gregory CLEMENT authored
Convert device tree bindings for Microsemi Ocelot SoC ICPU Interrupt Controller to YAML format Signed-off-by:
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Biwen Li authored
Update bindings for Layerscape external irqs, support more SoCs(LS1043A, LS1046A, LS1088A, LS208xA, LX216xA) Signed-off-by:
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- Nov 19, 2020
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Maxime Ripard authored
The RaspberryPi4 has both a WiFi chip and HDMI outputs capable of doing 4k. Unfortunately, the 1440p resolution at 60Hz has a TMDS rate on the HDMI cable right in the middle of the first Wifi channel. Add a property to our HDMI controller, that could be reused by other similar HDMI controllers, to allow the OS to take whatever measure is necessary to avoid that crosstalk. Signed-off-by:
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- Nov 13, 2020
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Marc Kleine-Budde authored
Since commit: 0e030a37 ("can: flexcan: fix endianess detection") the fsl,imx53-flexcan isn't compatible with the fsl,p1010-flexcan any more. As the former accesses the IP core in Little Endian mode and the latter uses Big Endian mode. With the conversion of the flexcan DT bindings to yaml, the dt_binding_check this throws the following error: Documentation/devicetree/bindings/clock/imx5-clock.example.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx53-flexcan', 'fsl,p1010-flexcan'] is too long Additional items are not allowed ('fsl,p1010-flexcan' was unexpected) 'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan'] 'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan'] 'fsl,imx6q-flexcan' was expected 'fsl,lx2160ar1-flexcan' was expected From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml The error is fixed by replacing the "fsl,p1010-flexcan" compatible (which turned out the be incompatible) with "fsl,imx25-flexcan" in the binding example. Reported-by: -
Marc Kleine-Budde authored
As both the i.MX35 and i.MX53 flexcan IP cores are compatible to the i.MX25, they are listed as: compatible = "fsl,imx35-flexcan", "fsl,imx25-flexcan"; and: compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; in the SoC device trees. This patch fixes the following errors, which shows up during a dtbs_check: arch/arm/boot/dts/imx53-ard.dt.yaml: can@53fc8000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx53-flexcan', 'fsl,imx25-flexcan'] is too long Additional items are not allowed ('fsl,imx25-flexcan' was unexpected) 'fsl,imx53-flexcan' is not one of ['fsl,imx7d-flexcan', 'fsl,imx6ul-flexcan', 'fsl,imx6sx-flexcan'] 'fsl,imx53-flexcan' is not one of ['fsl,ls1028ar1-flexcan'] 'fsl,imx6q-flexcan' was expected 'fsl,lx2160ar1-flexcan' was expected From schema: Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml Fixes: e5ab9aa7 ("dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml") Reported-by:
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- Nov 11, 2020
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Marc Kleine-Budde authored
The fsl,stop-mode property is a phandle-array and should consist of one phandle and two 32 bit integers, e.g.: fsl,stop-mode = <&gpr 0x34 28>; This patch fixes the following errors, which shows up during a dtbs_check: arch/arm/boot/dts/imx6dl-apf6dev.dt.yaml: can@2090000: fsl,stop-mode: [[1, 52, 28]] is too short From schema: Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml Fixes: e5ab9aa7 ("dt-bindings: can: flexcan: convert fsl,*flexcan bindings to yaml") Reported-by:
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- Nov 05, 2020
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Jack Yu authored
Add delay to fix pop noise from speaker. Signed-off-by:
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- Nov 03, 2020
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Oleksij Rempel authored
In order to automate the verification of DT nodes convert fsl-flexcan.txt to fsl,flexcan.yaml Signed-off-by:
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Oleksij Rempel authored
For now we have only node name as common rule for all CAN controllers Signed-off-by:
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Peter Ujfalusi authored
One space has been missing by the diagram update. Fixes: bb2bd7c7 ("dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling") Reported-by:
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- Nov 01, 2020
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Peter Ujfalusi authored
The new DMA architecture introduced with AM64 introduced new event types: unampped events. These events are mapped within INTA in contrast to other K3 devices where the events with similar function was originating from the UDMAP or ringacc. The ti,unmapped-event-sources should contain phandle array to the devices in the system (typically DMA controllers) from where the unmapped events originate. Signed-off-by:
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- Oct 28, 2020
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Mauro Carvalho Chehab authored
Several *.txt files got converted to yaml. Update their references at MAINTAINERS file accordingly. Signed-off-by:
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- Oct 26, 2020
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Rob Herring authored
Another round of wack-a-mole. The json-schema default is additional unknown properties are allowed, but for DT all properties should be defined. Signed-off-by: -
Rob Herring authored
In order to add meta-schema checks for additional/unevaluatedProperties being present, all schema need to make this explicit. As the top-level board/SoC schemas always have additional properties, add 'additionalProperties: true'. Acked-by:
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Rob Herring authored
Clean-up incorrect indentation, extra spaces, and missing EOF newline in schema files. Most of the clean-ups are for list indentation which should always be 2 spaces more than the preceding keyword. Found with yamllint (now integrated into the checks). Cc: linux-arm-kernel@lists.infradead.org Cc: dri-devel@lists.freedesktop.org Cc: linux-gpio@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: linux-iio@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: linux-mmc@vger.kernel.org Cc: linux-mtd@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: linux-usb@vger.kernel.org Acked-by: Wolfram Sang <wsa@kernel.org> # for I2C Acked-by: Sam Ravnborg <sam@ravnborg.org> # for display Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for-iio Signed-off-by: -
Ricardo Cañuelo authored
Add missing properties that are currently used in the examples of subnode bindings and in many DTs. Also updates the example in sound/google,cros-ec-codec.yaml to comply with the google,cros-ec binding. Reviewed-by:
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Ricardo Cañuelo authored
Convert the google,cros-ec-keyb binding to YAML and add it as a property of google,cros-ec.yaml Reviewed-by:
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Ricardo Cañuelo authored
Convert the google,cros-ec-i2c-tunnel binding to YAML and add it as a property of google,cros-ec.yaml. Reviewed-by:
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Icenowy Zheng authored
Add compatible string for V3s, with H3 one as fallback. This is used in device tree now, but not standardized in DT binding. Signed-off-by:
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Fabien Parent authored
As the binding documentation says, #mbox-cells must have a value of 2, but the example use a value 3. The MT8173 device tree correctly use mbox-cells = <2>. This commit fixes the example. Fixes: 19d8e335 ("dt-binding: gce: remove atomic_exec in mboxes property") Reviewed-by:
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Dan Murphy authored
Update the leds/common.yaml to indicate that the max color ID is 9. Reflect the same change in the leds-class-multicolor.yaml Reported-by:
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- Oct 23, 2020
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Guido Gunther authoredWe need to reset both for the panel to show an image. Fixes: b9ab1248 ("dt-bindings: Add Mantix MLAF057WE51-X panel bindings") Signed-off-by:
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- Oct 20, 2020
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Ard Biesheuvel authored
Since commit bbc4d71d ("net: phy: realtek: fix rtl8211e rx/tx delay config"), the Realtek PHY driver will override any TX/RX delay set by hardware straps if the phy-mode device property does not match. This is causing problems on SynQuacer based platforms (the only SoC that incorporates the netsec hardware), since many were built with this Realtek PHY, and shipped with firmware that defines the phy-mode as 'rgmii', even though the PHY is configured for TX and RX delay using pull-ups. From the driver's perspective, we should not make any assumptions in the general case that the PHY hardware does not require any initial configuration. However, the situation is slightly different for ACPI boot, since it implies rich firmware with AML abstractions to handle hardware details that are not exposed to the OS. So in the ACPI case, it is reasonable to assume that the PHY comes up in the right mode, regardless of whether the mode is set by straps, by boot time firmware or by AML executed by the ACPI interpreter. So let's ignore the 'phy-mode' device property when probing the netsec driver in ACPI mode, and hardcode the mode to PHY_INTERFACE_MODE_NA, which should work with any PHY provided that it is configured by the time the driver attaches to it. While at it, document that omitting the mode is permitted for DT probing as well, by setting the phy-mode DT property to the empty string. Fixes: 533dd11a ("net: socionext: Add Synquacer NetSec driver") Signed-off-by:
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- Oct 19, 2020
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Alexandre Belloni authored
Document the Microcrystal RV-3032 device tree bindings Signed-off-by:
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Alexandre Belloni authored
Some RTCs have a trickle charge that is able to output different voltages depending on the type of the connected auxiliary power (battery, supercap, ...). Add a property allowing to specify the necessary voltage. Signed-off-by:
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- Oct 15, 2020
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Mauro Carvalho Chehab authored
There were several files converted to yaml, but the .txt file is still referenced somewhere else. Update the references for them to point to the right file. Signed-off-by:
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- Oct 14, 2020
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Zhen Lei authored
Explicitly add "#address-cells = <0>" and "#size-cells = <0>" to eliminate below warnings. (spi_bus_bridge): /example-0/spi: incorrect #address-cells for SPI bus (spi_bus_bridge): /example-0/spi: incorrect #size-cells for SPI bus (spi_bus_reg): Failed prerequisite 'spi_bus_bridge' Signed-off-by:
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Zhen Lei authored
scripts/dtc/checks.c: if (get_property(node, "spi-slave")) spi_addr_cells = 0; if (node_addr_cells(node) != spi_addr_cells) FAIL(c, dti, node, "incorrect #address-cells for SPI bus"); if (node_size_cells(node) != 0) FAIL(c, dti, node, "incorrect #size-cells for SPI bus"); The above code in check_spi_bus_bridge() require that the number of address cells must be 0. So we should explicitly declare "#address-cells = <0>". Signed-off-by:
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Nobuhiro Iwamatsu authored
Add documentation for the binding of Toshiba Visconti SoC's watchdog. Signed-off-by:
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Jonathan Marek authored
Add device tree bindings for display clock controller for Qualcomm Technology Inc's SM8150 and SM8250 SoCs. Signed-off-by:
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Jonathan Marek authored
Add device tree bindings for video clock controller for SM8250 SoCs. Signed-off-by:
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Jonathan Marek authored
Add device tree bindings for video clock controller for SM8150 SoCs. Signed-off-by:
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Jonathan Marek authored
These two bindings are almost identical, so combine them into one. This will make it easier to add the sm8150 and sm8250 videocc bindings. Signed-off-by:
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- Oct 13, 2020
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Suman Anna authored
The Texas Instruments K3 family of SoCs have one or more dual-core Arm Cortex R5F processor subsystems/clusters (R5FSS). The clusters can be split between multiple voltage domains as well. Add the device tree bindings document for these R5F subsystem devices. These R5F processors do not have an MMU, and so require fixed memory carveout regions matching the firmware image addresses. The nodes require more than one memory region, with the first memory region used for DMA allocations at runtime. The remaining memory regions are reserved and are used for the loading and running of the R5F remote processors. The R5F processors can also optionally use any internal on-chip SRAM memories either for executing code or using it as fast-access data. The added example illustrates the DT nodes for the single R5FSS device present on K3 AM65x family of SoCs. Signed-off-by:
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Fabien Parent authored
Add binding documentation for topckgen, apmixedsys, infracfg, audsys, imgsys, mfgcfg, vdecsys on MT8167 SoC. Signed-off-by:
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Biju Das authored
Some hardware designs have USB typec connector attached to both SoC and super speed mux. We need to use separate connector node for such design. Signed-off-by:
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Kunihiko Hayashi authored
In the dt-bindings, "atu" reg-names is required to get the register space for iATU in Synopsis DWC version 4.80 or later. Link: https://lore.kernel.org/r/1601444167-11316-3-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by:
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Kunihiko Hayashi authored
In the dt-bindings, "atu" reg-names is required to get the register space for iATU in Synopsys DWC version 4.80 or later. Link: https://lore.kernel.org/r/1601444167-11316-2-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by:
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Sudeep Holla authored
The ARM MHU's reference manual states following: "The MHU drives the signal using a 32-bit register, with all 32 bits logically ORed together. The MHU provides a set of registers to enable software to set, clear, and check the status of each of the bits of this register independently. The use of 32 bits for each interrupt line enables software to provide more information about the source of the interrupt. For example, each bit of the register can be associated with a type of event that can contribute to raising the interrupt." This patch thus extends the MHU controller's DT binding to add support for doorbell mode. Though the same MHU hardware controller is used in the two modes, A new compatible string is added here to represent the combination of the MHU hardware and the firmware sitting on the other side (which expects each bit to represent a different signal now). Reviewed-by:
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Viresh Kumar authored
Convert the DT binding over to Json-schema. Reviewed-by:
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