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Angus Ainslie
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Eric Kuzmenko
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Francois Techene
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Guido Gunther
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- Aug 24, 2015
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Stephen Boyd authored
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Chao Xie <chao.xie@marvell.com> Signed-off-by: -
Stephen Boyd authored
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Signed-off-by: -
Stephen Boyd authored
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Reviewed-by:
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Stephen Boyd authored
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by:
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Stephen Boyd authored
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Linux-MIPS <linux-mips@linux-mips.org> Signed-off-by: -
Stephen Boyd authored
We're removing struct clk from the clk provider API, so switch to clk_get_rate() and clk_hw_get_rate() here appropriately. Acked-by:
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Stephen Boyd authored
This code is never called with a basic clock type, so the check here is not doing anything useful and is blocking the removal of __clk_get_flags(). Remove the check so we can delete the __clk_get_flags() API. Acked-by:
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Stephen Boyd authored
Mostly converted with the following snippet: @@ struct clk_hw *E; @@ -__clk_get_flags(E->clk) +clk_hw_get_flags(E) Acked-by:
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Stephen Boyd authored
Mostly converted with the following semantic patch: @@ struct clk_hw *E; @@ -__clk_get_num_parents(E->clk) +clk_hw_get_num_parents(E) Acked-by:
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Stephen Boyd authored
clk providers shouldn't need to use the consumer APIs (clk.h). Add provider APIs to replace the __clk_*() APIs that take a struct clk_hw as their first argument instead of a struct clk. Signed-off-by:
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- Aug 12, 2015
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Sjoerd Simons authored
Neither spdif_src nor spdif_pll exists, judging by the vendor kernel in both cases spdif_pre was meant. This brings the naming in line and hierachy in line with that of sclk_i2s0. Also allow sclk_spdif and spdif_frac to change their parents rate as that the upstream dividers are purely there to feed sclk_spdif Signed-off-by:
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Eric Anholt authored
Nothing uses it, and I can't find any evidence that anything ever has. Its role is now filled by the core clock in the firmware driver. Signed-off-by:
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Heiko Stuebner authored
While children of orphan clocks are not carried in the orphan-list itself, they're nevertheless orphans in their own right as they also don't have an input-rate available. To ease tracking if a clock is an orphan or has an orphan in its parent path introduce an orphan field into struct clk and update it and the fields in child-clocks when a clock gets added or removed from the orphan-list. Suggested-by:
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Maxime Ripard authored
The gates were handled with a common piece of framework that was registering all gates array, that was not using the CLK_OF_DECLARE logic, and was not using clock-indices but some private masks that were pretty much equivalent. Move this code in a new driver that handles all the gates array and solves both these issues. Signed-off-by:
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Maxime Ripard authored
Wrap the clock-indices to match the wrapping of the clock-output-names in order to make it easier to match indices to names. Signed-off-by:
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Maxime Ripard authored
The A23 and A33 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by:
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Maxime Ripard authored
The A20 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by:
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Maxime Ripard authored
The A31 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by:
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Maxime Ripard authored
The A10s and A13 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by:
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Maxime Ripard authored
The A10 gates have a non continuous set of clock IDs that are valid. Add the clock-indices property to the DT to express this. Signed-off-by:
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Michael Turquette authored
Merge tag 'imx-clk-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next The i.MX clock updates for 4.3: - Provide a better IPU clock initial settings on imx6dl for getting HDMI and LVDS at the same time. - Add clock driver support for i.MX6UL SoC - Add a second clock for RTC device on i.MX31 and i.MX35
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- Aug 07, 2015
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Andrzej Hajda authored
The patch was generated using fixed coccinelle semantic patch scripts/coccinelle/api/memdup.cocci [1]. [1]: http://permalink.gmane.org/gmane.linux.kernel/2014320 Signed-off-by:
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- Aug 05, 2015
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Philippe Reynes authored
The imx35 don't define clocks for rtc. This patch add two clocks, as needed by the mxc rtc driver. Signed-off-by:
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Philippe Reynes authored
The mxc rtc driver needs two clock. It was defined only one clock, so we define the second clock. Signed-off-by:
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- Aug 03, 2015
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Leo Yan authored
*of_iomap()* will check the device node pointer, and if the pointer is NULL it will return error code. So refine clock's init flow by checking the device node with this simple way; and polish a little for the print out message. Signed-off-by:
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- Jul 29, 2015
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Dan Carpenter authored
The ">" should be ">=" or we end up reading beyond the end of the array. Fixes: 6e973d2c ('clk: vexpress: Add separate SP810 driver') Signed-off-by:
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- Jul 28, 2015
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Krzysztof Kozlowski authored
The TSADC gate clock was used in Exynos4x12 DTSI for exynos-adc driver. However TSADC is present only on Exynos4210 so on Trats2 board (with Exynos4412 SoC) the exynos-adc driver could not be probed: ERROR: could not get clock /adc@126C0000:adc(0) exynos-adc 126c0000.adc: failed getting clock, err = -2 exynos-adc: probe of 126c0000.adc failed with error -2 Instead on Exynos4x12 SoCs the main clock used by Analog to Digital Converter is located in different register and it is named in datasheet as PCLK_ADC. Regardless of the name the purpose of this PCLK_ADC clock is the same as purpose of TSADC from Exynos4210. The patch adds gate clock for Exynos4x12 using the proper register so backward compatibility is preserved. This fixes the probe of exynos-adc driver on Exynos4x12 boards and allows accessing sensors connected to it on Trats2 board (ntc,ncp15wb473 AP and battery thermistors). Signed-off-by:
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Rob Herring authored
set_irq_flags is ARM specific with custom flags which have genirq equivalents. Convert drivers to use the genirq interfaces directly, so we can kill off set_irq_flags. The translation of flags is as follows: IRQF_VALID -> !IRQ_NOREQUEST IRQF_PROBE -> !IRQ_NOPROBE IRQF_NOAUTOEN -> IRQ_NOAUTOEN For IRQs managed by an irqdomain, the irqdomain core code handles clearing and setting IRQ_NOREQUEST already, so there is no need to do this in .map() functions and we can simply remove the set_irq_flags calls. Some users also modify IRQ_NOPROBE and this has been maintained although it is not clear that is really needed. There appears to be a great deal of blind copy and paste of this code. Signed-off-by:
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Jun Nie authored
The array of parent names can be made as array of const pointers to const strings. Signed-off-by:
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Jun Nie authored
Add SPDIF/I2S and GPIO clock for zx296702 Signed-off-by:
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Jun Nie authored
Add SPDIF/I2S divider clock method for zx296702 Signed-off-by:
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Vaibhav Hiremath authored
This patch cleans up the driver for, - Use devm_kcalloc() variant instead of devm_kzalloc() for array allocation. - clk_prepare()/unprepare(), remove "ret" variable as it is not required - use __exit for cleanup function As I am referring this driver as a reference for my 88pm800 clk driver, applying same changes here as well. Signed-off-by: -
Stephen Boyd authored
The recursive spinlock implementation trips up sparse and it complains that these functions have lock imbalances. That isn't really true though, so add some __acquires() and __releases() information so that sparse is quiet. drivers/clk/clk.c:116:22: warning: context imbalance in 'clk_enable_lock' - wrong count at exit drivers/clk/clk.c:141:9: warning: context imbalance in 'clk_enable_unlock' - unexpected unlock Signed-off-by: -
Stephen Boyd authored
The basic clock types use conditional locking for the register accessor spinlocks. Add __acquire() and __release() markings in the right locations so that sparse isn't tripped up on the conditional locking. drivers/clk/clk-mux.c:68:12: warning: context imbalance in 'clk_mux_set_parent' - different lock contexts for basic block drivers/clk/clk-divider.c:379:12: warning: context imbalance in 'clk_divider_set_rate' - different lock contexts for basic block drivers/clk/clk-gate.c:71:9: warning: context imbalance in 'clk_gate_endisable' - different lock contexts for basic block drivers/clk/clk-fractional-divider.c:36:9: warning: context imbalance in 'clk_fd_recalc_rate' - different lock contexts for basic block drivers/clk/clk-fractional-divider.c:68:12: warning: context imbalance in 'clk_fd_set_rate' - different lock contexts for basic block Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: -
Stephen Boyd authored
The missing license causes the clk-qcom.ko module to taint the kernel. Add the appropriate license to avoid taint. Signed-off-by: -
Stephen Boyd authored
Let's encourage const arrays of parent names like other basic clock types. Cc: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: -
Michael Turquette authored
Merge branch 'v4.3-topic/clk-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into clk-next
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Jim Quinlan authored
This commit allows certain Broadcom STB clock dividers to be used with clk-divider.c. It allows for a clock whose field value is the equal to the divisor, execpt when the field value is zero, in which case the divisor is 2^width. For example, consider a divisor clock with a two bit field: value divisor 0 4 1 1 2 2 3 3 Signed-off-by:
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Andy Shevchenko authored
Convert the code to use GENMASK() helper instead of div_mask() macro. Signed-off-by:
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Robert Jarzmik authored
Legacy drivers which are not yet ported, such as cpufreq-pxa[23]xx, rely on pxaXXx_get_clk_frequency_khz() to find the CPU core frequency. This reporting was broken because the expected unit is kHz and not Hz. Fix the reporting for pxa25x, pxa27x and pxa3xx. Fixes: fe7710fa ("clk: add pxa25x clock drivers") Fixes: d40670dc ("clk: add pxa27x clock drivers") Fixes: 9bbb8a33 ("clk: pxa: add pxa3xx clock driver") Signed-off-by:
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