• Peter Tyser's avatar
    fsl/85xx, 86xx: Sync up DMA code · 2f21ce4d
    Peter Tyser authored
    The following changes were made to sync up the DMA code between the 85xx
    and 86xx architectures which will make it easier to break out common
    8xxx DMA code:
    
    85xx:
    - Don't set STRANSINT and SPCIORDER fields in SATR register.  These bits
      only have an affect when the SBPATMU bit is set.
    - Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
      status register.  We may as well clear all 32 bits of the register...
    
    86xx:
    - Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
    - Add clearing of errors in the DMA status register when initializing
      the controller
    - Clear the channel start bit in the DMA mode register after a transfer
    Signed-off-by: default avatarPeter Tyser <ptyser@xes-inc.com>
    Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
    2f21ce4d
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