• York Sun's avatar
    powerpc/mpc8xxx: Add memory reset control · c63e1370
    York Sun authored
    JEDEC spec requires the clocks to be stable before deasserting reset
    signal for RDIMMs. Clocks start when any chip select is enabled and
    clock control register is set. This patch also adds the interface to
    toggle memory reset signal if needed by the boards.
    Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
    c63e1370
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