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Commit 93ea02bb authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
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arch: Clean up asm/barrier.h implementations using asm-generic/barrier.h


We're going to be adding a few new barrier primitives, and in order to
avoid endless duplication make more agressive use of
asm-generic/barrier.h.

Change the asm-generic/barrier.h such that it allows partial barrier
definitions and fills out the rest with defaults.

There are a few architectures (m32r, m68k) that could probably
do away with their barrier.h file entirely but are kept for now due to
their unconventional nop() implementation.

Suggested-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: default avatar"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Reviewed-by: default avatarMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Signed-off-by: default avatarPeter Zijlstra <peterz@infradead.org>
Cc: Michael Ellerman <michael@ellerman.id.au>
Cc: Michael Neuling <mikey@neuling.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Victor Kaplansky <VICTORK@il.ibm.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Link: http://lkml.kernel.org/r/20131213150640.846368594@infradead.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 1de7da37
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...@@ -22,59 +22,6 @@ ...@@ -22,59 +22,6 @@
#include <arch/spr_def.h> #include <arch/spr_def.h>
#include <asm/timex.h> #include <asm/timex.h>
/*
* read_barrier_depends - Flush all pending reads that subsequents reads
* depend on.
*
* No data-dependent reads from memory-like regions are ever reordered
* over this barrier. All reads preceding this primitive are guaranteed
* to access memory (but not necessarily other CPUs' caches) before any
* reads following this primitive that depend on the data return by
* any of the preceding reads. This primitive is much lighter weight than
* rmb() on most CPUs, and is never heavier weight than is
* rmb().
*
* These ordering constraints are respected by both the local CPU
* and the compiler.
*
* Ordering is not guaranteed by anything other than these primitives,
* not even by data dependencies. See the documentation for
* memory_barrier() for examples and URLs to more information.
*
* For example, the following code would force ordering (the initial
* value of "a" is zero, "b" is one, and "p" is "&a"):
*
* <programlisting>
* CPU 0 CPU 1
*
* b = 2;
* memory_barrier();
* p = &b; q = p;
* read_barrier_depends();
* d = *q;
* </programlisting>
*
* because the read of "*q" depends on the read of "p" and these
* two reads are separated by a read_barrier_depends(). However,
* the following code, with the same initial values for "a" and "b":
*
* <programlisting>
* CPU 0 CPU 1
*
* a = 2;
* memory_barrier();
* b = 3; y = b;
* read_barrier_depends();
* x = a;
* </programlisting>
*
* does not enforce ordering, since there is no data dependency between
* the read of "a" and the read of "b". Therefore, on some CPUs, such
* as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
* in cases like this where there are no data dependencies.
*/
#define read_barrier_depends() do { } while (0)
#define __sync() __insn_mf() #define __sync() __insn_mf()
#include <hv/syscall_public.h> #include <hv/syscall_public.h>
...@@ -125,20 +72,7 @@ mb_incoherent(void) ...@@ -125,20 +72,7 @@ mb_incoherent(void)
#define mb() fast_mb() #define mb() fast_mb()
#define iob() fast_iob() #define iob() fast_iob()
#ifdef CONFIG_SMP #include <asm-generic/barrier.h>
#define smp_mb() mb()
#define smp_rmb() rmb()
#define smp_wmb() wmb()
#define smp_read_barrier_depends() read_barrier_depends()
#else
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define smp_read_barrier_depends() do { } while (0)
#endif
#define set_mb(var, value) \
do { var = value; mb(); } while (0)
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif /* _ASM_TILE_BARRIER_H */ #endif /* _ASM_TILE_BARRIER_H */
...@@ -14,15 +14,6 @@ ...@@ -14,15 +14,6 @@
#define dsb() __asm__ __volatile__ ("" : : : "memory") #define dsb() __asm__ __volatile__ ("" : : : "memory")
#define dmb() __asm__ __volatile__ ("" : : : "memory") #define dmb() __asm__ __volatile__ ("" : : : "memory")
#define mb() barrier() #include <asm-generic/barrier.h>
#define rmb() barrier()
#define wmb() barrier()
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#define read_barrier_depends() do { } while (0)
#define smp_read_barrier_depends() do { } while (0)
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
#endif /* __UNICORE_BARRIER_H__ */ #endif /* __UNICORE_BARRIER_H__ */
...@@ -9,21 +9,14 @@ ...@@ -9,21 +9,14 @@
#ifndef _XTENSA_SYSTEM_H #ifndef _XTENSA_SYSTEM_H
#define _XTENSA_SYSTEM_H #define _XTENSA_SYSTEM_H
#define smp_read_barrier_depends() do { } while(0)
#define read_barrier_depends() do { } while(0)
#define mb() ({ __asm__ __volatile__("memw" : : : "memory"); }) #define mb() ({ __asm__ __volatile__("memw" : : : "memory"); })
#define rmb() barrier() #define rmb() barrier()
#define wmb() mb() #define wmb() mb()
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
#error smp_* not defined #error smp_* not defined
#else
#define smp_mb() barrier()
#define smp_rmb() barrier()
#define smp_wmb() barrier()
#endif #endif
#define set_mb(var, value) do { var = value; mb(); } while (0) #include <asm-generic/barrier.h>
#endif /* _XTENSA_SYSTEM_H */ #endif /* _XTENSA_SYSTEM_H */
/* Generic barrier definitions, based on MN10300 definitions. /*
* Generic barrier definitions, originally based on MN10300 definitions.
* *
* It should be possible to use these on really simple architectures, * It should be possible to use these on really simple architectures,
* but it serves more as a starting point for new ports. * but it serves more as a starting point for new ports.
...@@ -16,35 +17,50 @@ ...@@ -16,35 +17,50 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#define nop() asm volatile ("nop") #include <linux/compiler.h>
#ifndef nop
#define nop() asm volatile ("nop")
#endif
/* /*
* Force strict CPU ordering. * Force strict CPU ordering. And yes, this is required on UP too when we're
* And yes, this is required on UP too when we're talking * talking to devices.
* to devices.
* *
* This implementation only contains a compiler barrier. * Fall back to compiler barriers if nothing better is provided.
*/ */
#define mb() asm volatile ("": : :"memory") #ifndef mb
#define mb() barrier()
#endif
#ifndef rmb
#define rmb() mb() #define rmb() mb()
#define wmb() asm volatile ("": : :"memory") #endif
#ifndef wmb
#define wmb() mb()
#endif
#ifndef read_barrier_depends
#define read_barrier_depends() do { } while (0)
#endif
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
#define smp_mb() mb() #define smp_mb() mb()
#define smp_rmb() rmb() #define smp_rmb() rmb()
#define smp_wmb() wmb() #define smp_wmb() wmb()
#define smp_read_barrier_depends() read_barrier_depends()
#else #else
#define smp_mb() barrier() #define smp_mb() barrier()
#define smp_rmb() barrier() #define smp_rmb() barrier()
#define smp_wmb() barrier() #define smp_wmb() barrier()
#define smp_read_barrier_depends() do { } while (0)
#endif #endif
#define set_mb(var, value) do { var = value; mb(); } while (0) #ifndef set_mb
#define set_wmb(var, value) do { var = value; wmb(); } while (0) #define set_mb(var, value) do { (var) = (value); mb(); } while (0)
#endif
#define read_barrier_depends() do {} while (0)
#define smp_read_barrier_depends() do {} while (0)
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif /* __ASM_GENERIC_BARRIER_H */ #endif /* __ASM_GENERIC_BARRIER_H */
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