• Thierry Reding's avatar
    dt-bindings: memory: Add Tegra186 support · 029ab5ea
    Thierry Reding authored
    As opposed to earlier incarnations, the memory controller on Tegra186 no
    longer implements an SMMU. Instead the SMMU is a regular ARM SMMU and in
    a separate IP block.
    
    However, the memory controller programs the SMMU stream IDs for each of
    the memory clients. Add a header file with definitions for each of these
    stream IDs and mark the #iommu-cells property as required on Tegra30 to
    Tegra210 in the device tree bindings.
    Signed-off-by: 's avatarThierry Reding <treding@nvidia.com>
    029ab5ea
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