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Set PL4 ASAP after leaving reset, improve field log

Jonathon Hall requested to merge l14-freeze-202404 into master

Set PL4 as soon as possible after the CPU leaves reset.

It appears that the EC is in some cases setting PL4 too late, and this may be causing resets / freezes:

  • In some cases, the first attempt to set PL4 is rejected with a retriable error (observed in field logs)
  • PLT_RST# seems to deassert consistently after ~150 ms in resume, meaning a wait of 200 ms may be executing briefly without PL4 (measured PLT_RST# deassertion in test builds)
  • The DDR3_VR power rail sometimes drops out during resume, causing a reset (observed in field logs)
  • I think DDR3_VR is in some cases browning out during resume but is not noticed by the EC, which may be causing memory corruption leading to freezes later (field logs)

Try harder to set PL4 as soon as possible after the CPU leaves reset, and trace if this fails.

Improve the field log:

  • Expand the field log to 128 bytes by storing the "failure" log in flash instead of BRAM
  • Include an elapsed time measurement for each event (8-bit floating point, range 0-31744 ms, saturating)

Data-in-flash support for Librem 14 is fixed as well, which fixes the persistent keymap.

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