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Takashi Iwai authored
The recent commit (ca460f86) changed the CORB RP reset procedure to
follow the specification with a couple of sanity checks.
Unfortunately, Nvidia controller chips seem not following this way,
and spew the warning messages like:
  snd_hda_intel 0000:00:10.1: CORB reset timeout#1, CORBRP = 0

This patch adds the workaround for such chips.  It just skips the new
reset procedure for the known broken chips.

Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
6ba736dd
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