- Oct 29, 2019
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Guido Gunther authored
This reverts commit 87b1baf32040f405618902d31106296813c78811. Fixes vt switching but makes the blank/unblank shift reappear.
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Guido Gunther authored
Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
This allows to run without modules for the moment and have a working display. Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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magnetometer The LSM9DS1 uses a high level interrupt. Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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use vselect to set the io voltage to 1.8V Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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reinsterted By adding broken-cd to the usdhc2 stanza the Redpine card can be detected when the HKS is turned of and on. Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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Instead of just raising irq0 for all the cores, we mask the irq0 for all the non-target cores, this way waking up only the core we want. All of this is done now in TF-A. Also, since this new workaround doesn't need the IOMUX_GPR1 register here in kernel, the IOMUX_GPR reg entry inside the gic dts node can be removed. In order for this to work, the following commit is needed in TF-A: 0e91ff59720d0756 ("MLK-21399 plat: imx8mq: gpc: Workaround for ERR11171") Signed-off-by:
Abel Vesa <abel.vesa@nxp.com> Reviewed-by:
Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by:
Angus Ainslie <angus@akkea.ca>
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This reverts commit 617f7964.
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Guido Gunther authored
Use overcurrent protection and limit brightness. This should go into DT. Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Early during boot access imx8mq's i2c returns timeout, later on it works so defer probing a bit until we found the real reason. Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
The current setup of LM3692X_BOOST_CTRL use flags from LM3692X_BRT_CTRL. Use flagx from LM3692X_BOOST_CTRL but leave the resulting value unchanged. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
Use LM3692X_RAMP_EN instead of LM3692X_PWM_HYSTER_4LSB since the later is a flag for the PWM register. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
Instead use devm_regulator_get_optional since the regulator is optional and check for errors. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
The driver currently reports successful intialization on every failure as long as it's able to power off the regulator. Don't check the return value of regulator_disable to avoid that. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
This gives a way better idea what is going on. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Guido Gunther authored
The TPS65132B5 needs DSI_BIAS_EN for I²C to work but having it ENP/ENN enabled via the avdd/avee dt nodes would not work since those regulators won't be enabled before I²C is set up - which makes sense from a driver point of view. So to ensure DSI_BIAS_EN is always enabled before the driver is probed squash it in as a gpio enabled regulator between reg_vsys_3v4 and the TPS65132B5 which is how this gpio works after all. Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
Add #cooling-cells for when the gpu acts as a cooling device. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Add the missing call to kref_init() before using the refcount.
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Guido Gunther authored
This allows it to be used as backlight devices e.g. linked to a drm panel. todo: conditionalize on BACKLIGHT_CLASS_DEVICE Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Guido Gunther authored
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Guido Gunther authored
The panel uses a Focaltech FT8006P chip and can be found in the Librem5. TODO: - add binding docs Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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The devkit and phone are sufficiently similar that we only need one config compile in thermal enable the focaltech touchscreen driver arm64: config: librem5: build more USB drivers arm64: config: librem5: enable dynamic debug config: librem5: enable clock_thermal config: librem5: enable fuel gauge Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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Drop -phone from names Add rfkill for wifi, bluetooth, wwan and gps aarch64: dts: librem5: backlight, dcs and panel updates dts: librem5: Fix hp detect dts: librem5: Enable pullups for buttons dts: librem5: Enable audio codec WIFI3V3_EN and BT_REG_ON should be on by default In GPIO_CONTROL mode poll the sdio bus Fix up some of the gpio control. Add the pinmuxes for the rfkill-gpio drivers. Add some USB options to try and get the hub working. Add broken-cd for the wifi M.2 card to poll for power changes. dts: librem5: drop duplicate pinctrl_charger dts: librem5: fuel gauge dts: librem5: Drop active-low from leds dts: librem5: enable modem by default Temperature and hysteresis were picked after the CPU. Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca> Signed-off-by:
Guido Günther <guido.gunther@puri.sm>
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This gets rid of the warning about a debug kernel Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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Read the version number from the flash module Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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Refer to line 2308 in https://git.kernel.org/pub/scm/linux/kernel/git/jberg/iw.git/tree/scan.c Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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refer to Librem5/linux-emcraft#3 for discussions of this issue. Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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Guido Gunther authored
Use the current battery voltage and an ocv table to provide battery capacity information. Signed-off-by:
Guido Günther <agx@sigxcpu.org>
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Add a simple-battery with default power capacity Discharge curve comes from the panasonic NCR18650B datasheet https://www.batteryspace.com/prod-specs/NCR18650B.pdf Signed-off-by:
Angus Ainslie (Purism) <angus@akkea.ca>
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Register the ARM generic cpuidle driver as a cooling device. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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For cpuidle_cooling_runtime() returning 0, no idle-injection is applied. For an idle injection percentage of 0, this makes sense. But this happends for the idle injection percentage of 100 too, which is wrong. The documented calculation: ((idle_cycle * 100) / state) - idle_cycle results 0 for state being 100. For "state" from 0 to 99, the thermal driver throttles accordingly and keeps the CPUs cool. When switching to 100, it stops cooling, we see a jump up in temperature and the CPU heats up until it shuts down. Work around this problem by keeping the "state" at 99 for calculations, never reaching 100. The user interface still reaches 100, but there is no formal connection to actual data and the UI. It's just a unified range that can be implemented in various ways.
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Only when the cpufreq strategy is used, it gets defined in cpu_cooling.c This has to be considered a workaround, fixing the build for the cpuidle thermal driver.
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The cpu idle cooling driver performs synchronized idle injection across all cpus belonging to the same cluster and offers a new method to cool down a SoC. Each cluster has its own idle cooling device, each core has its own idle injection thread, each idle injection thread uses play_idle to enter idle. In order to reach the deepest idle state, each cooling device has the idle injection threads synchronized together. It has some similarity with the intel power clamp driver but it is actually designed to work on the ARM architecture via the DT with a mathematical proof with the power model which comes with the Documentation. The idle injection cycle is fixed while the running cycle is variable. That allows to have control on the device reactivity for the user experience. At the mitigation point the idle threads are unparked, they play idle the specified amount of time and they schedule themselves. The last thread sets the next idle injection deadline and when the timer expires it wakes up all the threads which in turn play idle again. Meanwhile the running cycle is changed by set_cur_state. When the mitigation ends, the threads are parked. The algorithm is self adaptive, so there is no need to handle hotplugging. If we take an example of the balanced point, we can use the DT for the hi6220. The sustainable power for the SoC is 3326mW to mitigate at 75°C. Eight cores running at full blast at the maximum OPP consumes 5280mW. The first value is given in the DT, the second is calculated from the OPP with the formula: Pdyn = Cdyn x Voltage^2 x Frequency As the SoC vendors don't want to share the static leakage values, we assume it is zero, so the Prun = Pdyn + Pstatic = Pdyn + 0 = Pdyn. In order to reduce the power to 3326mW, we have to apply a ratio to the running time. ratio = (Prun - Ptarget) / Ptarget = (5280 - 3326) / 3326 = 0,5874 We know the idle cycle which is fixed, let's assume 10ms. However from this duration we have to substract the wake up latency for the cluster idle state. In our case, it is 1.5ms. So for a 10ms latency for idle, we are really idle 8.5ms. As we know the idle duration and the ratio, we can compute the running cycle. running_cycle = 8.5 / 0.5874 = 14.47ms So for 8.5ms of idle, we have 14.47ms of running cycle, and that brings the SoC to the balanced trip point of 75°C. The driver has been tested on the hi6220 and it appears the temperature stabilizes at 75°C with an idle injection time of 10ms (8.5ms real) and running cycle of 14ms as expected by the theory above. Signed-off-by:
Kevin Wangtao <kevin.wangtao@linaro.org> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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The next changes will add new way to cool down a CPU. In order to sanitize and make the overall cpu cooling code consistent and robust we must prevent the cpu cooling devices to co-exists with the same purpose at the same time in the kernel. Make the CPU cooling device a choice in the Kconfig, so only one CPU cooling strategy can be chosen. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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Provide some documentation for the idle injection cooling effect in order to let people to understand the rational of the approach for the idle injection CPU cooling device. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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