Port the code from chromeos flashrom

BUG=b:144297264
TEST=Tested using W25Q128JWDTR in SPI mode

Signed-off-by: Peichao.Wang <peichao.wang@bitland.corp-partner.google.com>
Change-Id: Ifc28878b17dc10da2cfd8f82fffbd57adb22799e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/36717


Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

This adds missing voltage and capacity variants for N25Q and MT25Q
series devices. This also fixes a typo in some model numbers where the
last letter should have been a G instead of an E. Added devices include:

N25Q256..1E
N25Q512..1G
N25Q00A..1G
N25Q00A..3G
MT25QU128
MT25QL128
MT25QU256
MT25QU512 tested by Jacob Creedon <jcreedon@google.com>
MT25QL01G tested by Konstantin Grudnev <grudnevkv@gmail.com>
MT25QU01G
MT25QL02G
MT25QU02G

Two have been tested as indicated, all other variants added are marked
untested.

Signed-off-by: Jacob Creedon <jcreedon@google.com>
Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34491


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Add `util/getversion.sh` that retrieves version information from a
`versioninfo.inc` (what we use for releases) if present or uses
`util/getrevision.sh` if not.

Let Meson use it for flashrom's version. It seems Meson doesn't
generate the manual page at all, so the `--man-date` command is
currently unused.

Change-Id: I401e5638509c4a573bc0cb17ebc5fa76df9700b5
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35561


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Limonciello <superm1@gmail.com>
Reviewed-by: Richard Hughes <hughsient@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

Change-Id: Ie23612226a48d6732750f51547642da0a6257dd8
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/36219


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Introduce cli_classic_single_operation() to consolidate the repeating
pattern of multiple CLI operations at once. Also modify
cli_classic_abort_usage() to take an optional error abort string and
print it to stderr, this allows for trimming a few more lines off the
cli implementation.

V.2: A few fixes upon review:
  - Trim off some unnecessary braces for single line branches.
  - Pass 'operation_specified' by reference.
  - Rename a function.
V.3: Fix print order of cli_classic_abort_usage().

Change-Id: I54598efdaee2b95cb278b0f2aac05f48bbd95bef
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35611


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Make the first line of --help in usage to align with the
format of the man page, including fixing any missing options.

V.2: Add an extra space.

Change-Id: I44f82c6a54fddb54bf268fe6eb22e50acb6025cf
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35793


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

The typical convention is to not use the `lib` prefix (ie `libfoo`)
but instead to just use foo.

Change-Id: I5ab46418e2a1708d5c11970f1e56250f2adb7d70
Signed-off-by: Mario Limonciello <mario.limonciello@dell.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/36069


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Hughes <richard@hughsie.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

Match strictly the library version, and remove all starting letters.

Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545
Signed-off-by: Mario Limonciello <mario.limonciello@dell.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35566


Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Richard Hughes <richard@hughsie.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>

This works around a missing header in spidev.h present in older
versions of Linux. Patch is ported from:
https://git.buildroot.net/buildroot/tree/package/flashrom/0001-spi.patch



Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Change-Id: Ieab60f59bc63aca0dc4867f31699dab4167da05b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35830


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Enforce the DCO. The logic comes from coreboot's commit-msg hook,
and I've added a pointer to flashrom's development guidelines.

Change-Id: Iea49a06c2d4824be073eff98c8aae1cbc5b145e4
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35295


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Change-Id: Id9e07332003832465a0eccf1d89e73d15abb35c0
Signed-off-by: Jonathan Liu <net147@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35808


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Tested reading, writing and erasing the internal flash chip using an HP
Pro 6300 SFF mainboard with an Intel Q75 PCH. However, since ME-enabled
chipsets are marked as DEP instead of OK, this one shall also be.

Change-Id: I273af0eb33e74b31bc4fdc95362527bba080c5a0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35826


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Enable all -Wextra warnings but -Wunused-parameter. Nobody seems to
miss warnings about unused parameters and we have a lot unavoidable
occurrences in flashrom because of common interfaces.

Change-Id: Id2ece264c2d483e34019985dd3a7631c4889abe6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/30411


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>

Change-Id: I7e49e468c7f1eaf0ddd5fc08d6cc6569274faf94
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35798


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

In case of an empty `board_matches` list (i.e. on non-x86), we checked
if the `unsigned i` is smaller 0. Shuffling the computation avoids that
problem.

Change-Id: I636d73c920a7b7e7507eafe444bab8236d7acb67
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35801


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

The one in the `dummyflasher` is a little peculiar. We actually never
knew the type of the `st_size` field in `struct stat`. It happens to
be `signed` in some systems (e.g. DJGPP).

Change-Id: If36ba22606021400b385ea6083eacc7b360c20c5
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35800


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

Parts of flashrom are 2.0+ but some are not. As Meson's purpose is to
link these together, it should advertise only GPL-2.0 for the whole.

Change-Id: Iab99c74f5f9d54dac56085ecc7475b14be00a310
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35584


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

Reported in issue #105 on github.

Change-Id: Ibe484b4ef60533135fa1e96eb203bb55985d1f8e
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35819


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

Automotive 2 Mbit (256KiB) serial SPI bus EEPROM
PREW tested successfully with use of ch341a programmer
on Linux host 5.2.0-1-MANJARO x86_64

Signed-off-by: Konstantin Grudnev <grudnevkv@gmail.com>
Change-Id: Ic29cd9051c7eac4822d620c299834134f987f01b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34496


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

When compiling, this warning gives string literals the type const char[]
to help catch accidental modification (which is undefined behaviour).
There currently aren't any instances of this in flashrom, so let's
enable this warning to keep it that way. This requires adding const
qualifiers to the declarations of several variables that work with
string literals.

Change-Id: I62d9bc194938a0c9a0e4cdff7ced8ea2e14cc1bc
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34577


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

See github issue #32:
https://github.com/flashrom/flashrom/issues/32



Change-Id: I12b25ca3f85e5f2302681bddbe1adafa49c5fcb9
Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34764


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

Provide strndup implementation if compiled with MinGW because
it is a POSIX only method

Signed-off-by: Miklós Márton <martonmiklosqdev@gmail.com>
Change-Id: If418080bffff1f5961cacf2a300ea9c666682458
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34621


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

We have this in the ChromiumOS fork of flashrom which we rely
on to obtain the current flash chip in use. This ports it for
upstream consumption.

V.2: Constrain number_of_operations to one as per Nico's comment.
V.3: Rename '--get-size' to '--flash-size' however keep old arg as
     'undocumented' for back-compat.
V.4: Add missing --help line.
V.5: Add man page entry.
V.6: Use printf() directly.

Change-Id: I8f002f3b2012aec4d26b0e81456697b9a5de28d6
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35592


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

We have this in the ChromiumOS fork of flashrom which we rely
on to obtain the current flash chip in use. This ports it for
upstream consumption.

V.2: Constrain number_of_operations to one as per Nico's comment.
V.3: Move two goto's outside inner if-else block.
V.4: Add missing --help line.
V.5: Add man page entry.
v.6: Use printf() directly.

Change-Id: I23d574a2f8eaf809a5c0524490db9e3a560ede56
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35591


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Print an error message and return if the read from emu_persistent_image
fails.

Change-Id: Icd1a72f9171e547f2081ba4bc53834a17ef7fcab
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1403912
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34845


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

Since fread() returns the number of bytes read, this currently will only
check for errors if it returns 0 (i.e. the file was empty). However, it
is possible for fread() to encounter an error after reading a few bytes,
which this doesn't catch. Fix this by using fgets() instead, which will
return NULL if EOF or an error is encountered, and is simpler anyway.

Change-Id: I4f37c70e97149b87c6344e63a57d11ddde7638c4
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1403824
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34848


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

Freeing this string won't really matter in the incredible case that we
run out of memory, but it keeps Coverity happy.

Change-Id: I962d2f2227850473b70272bc48b3fc0a0fb11342
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1403822
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34849


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

extract_programmer_param() stores allocated memory in param, so make
sure it is freed at the end of the function.

Change-Id: I363e66b49c1ed4034ac058b94a938c8bb197e048
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1403823
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34847


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

The board vendor and model are sometimes specified as arguments during
an internal flash, so make sure they are freed at the end of
initialization.

Change-Id: I9f43708f3b075896be67acec114bc6f390f8c6ca
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1230664, 1230665
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34846


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>

This aligns the upstream master branch with chromium's. On-the-fly
opcode reprogramming is supported by both branches so the default
opcode shouldn't matter.

Review URL: http://codereview.chromium.org/3239001



Change-Id: I379549e8fa966e75e3d8b7932700df62cf50df64
Signed-off-by: Mayur Panchal <panchalm@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34689


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

Add a printlock attribute for the Winbond W25Q128.V..M chip. The
printlock attributes matches the ChromiumOS repo's definition of this
chip.

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I775d5d40677593dcb2d05750f8bbc62871b0e551
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35549


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Mark Winbond W25Q40EW as TESTED_PREW.

The Winbond W25Q40EW has been marked TESTED_PREW in the ChromiumOS
repository. ChromiumOS has the same defintion for this chip as this
repo, except that ChromiumOS does not have FEATURE_OTP.

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I4be5b2e1069a3f735f0dc6ec92d5f4c8946fbb02
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35535


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Take definition of GD25Q256D from ChromiumOS repository.

This chip was added in `commit 0c38355c` by dlaurie@google.com
2019-03-17.

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I79d4ed48aa9126a8a6ce455a9564451346195b8f
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35480


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Add <stdbool.h> and <stdint.h> to allow compilation in fwupd.

Signed-off-by: Mario Limonciello <mario.limonciello@dell.com>
Change-Id: Ib48ddc6412f82677f43e445346dc64ccfadf2423
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35155


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>

Mark EN29F002(A)(N)B as tested for erase and write. This chip was marked
tested in the Chromium (downstream) repo change
98d917cfba55b68516cdf64c754d2f36c8c26722 "Add a bunch of new/tested
stuff and various small changes 8"

TEST=Build and run flashrom -L

Signed-off-by: Alan Green <avg@google.com>
Change-Id: Idd26187905f389fc858eea5b13915af88e40afe9
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35092


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Apply downstream patch d978051c2e7da88088ec4ef19827c04873a5479d,
"flashrom: Identify MX25L25645G part" from
chris_zhou@compal.corp-partner.google.com 2019-04-13. Change description
was:

"""
MX25L25635F and MX25L25645G have the same chips identify. Add
MX25L25645G to the name of the part so that it doesn't confused people.
"""

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I317345b4753cfc46fdca8f673a0591e33b62138b
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35091


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Renamed GigaDevice GD25Q128 to GD25Q127C/GD25Q128.

According to downstream (ChromiumOS) change
4216ba3d0fbd1804a71002b9c17e0b04029a03f1 "flashchips: Add GD25Q127C name
to the GD25Q128C entry", the 127C chip is replacement for the 128C chip.
I have confirmed that 127C is newer and that 128C does not appear to be
documented on Gigadevice's website or available from Digikey.

TEST=Ran flashrom -L

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I3366e5904eff2443fda90552f7f5e31a8785d8b3
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35089


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Put entry for Unknown SFDP-capable chip back into place at end of file.

Change 1f9cc7d8 "flashchips.c: Sort file
by vendor and model" reordered many entries in flashchips.c, including
this one. However, the entry for Unknown, SFDP-capable chip should not
have been moved before any specific chip entries.

As reported by Angel Pons <th3fanbus@gmail.com> at
https://review.coreboot.org/c/flashrom/+/33931

:

"""
Oops, this introduced a bug: the SFDP entry is no longer at the end of
flashchips.c, so probing on a SFDP-capable Winbond chip results in added
noise (flashrom says things about an unknown chip, and then has two
definitions for the same chip).
"""

Signed-off-by: Alan Green <avg@google.com>
Change-Id: I5955020456dbcd5e7db280a459b668a743e464dc
Reviewed-on: https://review.coreboot.org/c/flashrom/+/35037


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>

Work based on lukasz.dmitrowski@gmail.com code

Change-Id: I49041b8fa5700dabe59fef0d2337339d34cd6c6f
Signed-off-by: Artur Raglis <artur.raglis@3mdeb.com>
Signed-off-by: Lukasz Dmitrowski <lukasz.dmitrowski@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34363


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

Change name of GD25LQ128 to GD25LQ128CD. This is an upstreaming of the
change from the chromium flashrom repo SHA
6c957d745f5d3dcadd1035734a5cf1b804bd0f2f (Also visible at
https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/1181175)

The rationale from that change was:

    The GD25LQ128C part is EOL. It's replacement is GD25LQ128D, but
    both chips identify in the same manner. Add GD25LQ128D to the name
    of the part so that it doesn't confused people.

Making this name consistent will simplify further merging from the
chromium fork.

Change-Id: I57804f1a33170668e029a7b08ac050d9a3bd6dbb
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34735


Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>