- Aug 20, 2020
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Jeremiah Foster authored
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- Jun 12, 2020
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Jeremiah Foster authored
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Jeremiah Foster authored
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Jeremiah Foster authored
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Jeremiah Foster authored
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Jeremiah Foster authored
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Jeremiah Foster authored
Removing util/getrevision.sh since Debian does't use it either Looks like we have to have util/getrevision.sh if we want a version from the binary.
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- Feb 09, 2020
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Bernhard Urban-Forster authored
As found on the Tesla AP2.5 board. Based on https://mail.coreboot.org/pipermail/flashrom/2013-June/011066.html Tested with: flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=512 -r content.bin Signed-off-by:
Bernhard Urban-Forster <lewurm@gmail.com> Change-Id: Ifa9b7615951125b6bbc1f051370ef54896bf506c Reviewed-on: https://review.coreboot.org/c/flashrom/+/38596 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
David Hendricks <david.hendricks@gmail.com>
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Johanna Schander authored
Intel Ice Lake systems use an 495 Series Chipset that behaves compatible to pch300 chips but chip names are undocumented at this point. This change was tested in read/write/erase on the Razer Blade Stealth (late 2019) with intel 1065G7 CPU and "Ice Lake U Premium PCH". Change-Id: I6227d32f4476420cf1aeec37ebd4b7648e0b3d15 Signed-off-by:
Johanna Schander <git@mimoja.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/37987 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Christoph Pomaska <github@slrie.de> Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Feb 01, 2020
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Angel Pons authored
Change-Id: Iea40da587729f3975a8901d3933e7567805242c5 Signed-off-by:
Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38659 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Frans Hendriks <fhendriks@eltan.com> Reviewed-by:
David Hendricks <david.hendricks@gmail.com> Reviewed-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-by:
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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- Jan 22, 2020
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Wim Vervoorn authored
Intel Kaby Lake U (with the 9d4e device id) support is available but marked not tested. Tested reading, writing and erasing both internal flash chips on the Facebook Monolith system with the Intel i3 7100U SoC. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well. Signed-off-by:
Wim Vervoorn <wvervoorn@eltan.com> Change-Id: Ie35cc896e29baffa63fe9e37c14770001b54e7ec Reviewed-on: https://review.coreboot.org/c/flashrom/+/38481 Tested-by:
Nico Huber <nico.h@gmx.de> Reviewed-by:
Nico Huber <nico.h@gmx.de> Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Jan 20, 2020
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Carl-Daniel Hailfinger authored
Signed-off-by:
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Change-Id: Ia5ed00c488b0719b2bdd6c8f304900511684f445 Reviewed-on: https://review.coreboot.org/c/flashrom/+/38477 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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- Jan 19, 2020
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Nico Huber authored
This reverts commit e28d75ed. This is broken in multiple ways, e.g. pcidev_init() can only return NULL. Change-Id: I06242147ba9d3a062d442f645eb0800ef51af19f Signed-off-by:
Nico Huber <nico.h@gmx.de> Acked-by:
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Reported-by:
Michael Bishop <cleverca22@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38319 Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Jan 02, 2020
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Nico Huber authored
GCC 4.8 wants an explicit `-std=c99` or something for this to work. It seems easier to keep the common declaration style. Change-Id: Ic0819f82169df4d66cc949494229b0749c06e8f6 Signed-off-by:
Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38034 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Angel Pons <th3fanbus@gmail.com> Reviewed-by:
Miklós Márton <martonmiklosqdev@gmail.com>
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- Dec 31, 2019
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Miklós Márton authored
Change-Id: Icffab87ac8f2c570187ed753ec70f054541873a4 Signed-off-by:
Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/34661 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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- Dec 21, 2019
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Angel Pons authored
Tested reading, writing and erasing the internal flash chip using a Samsung NP530U3C laptop with an Intel HM76 PCH. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well. Change-Id: I1097c5fcf782e7ecf52f05c571ad188456307d00 Signed-off-by:
Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/37803 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Edward O'Callaghan <quasisec@chromium.org>
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- Dec 14, 2019
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David Hendricks authored
Something to point users to when SMM_BWP might be causing problems. Change-Id: I394c033e8d4ff96433162f86aefb428d8acf6349 Signed-off-by:
David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36986 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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Rosen Penev authored
Signed-off-by:
Rosen Penev <rosenp@gmail.com> Change-Id: I88cbe74b716d5fab16133fbf2ce9c35b74c25f32 Reviewed-on: https://review.coreboot.org/c/flashrom/+/35831 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
David Hendricks <david.hendricks@gmail.com> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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darkarnium authored
This commit adds support for the Adesto AT25SF321 SPI flash chip. Probe and read operations have been tested via FT2232H interface, but writes have not been verified. Datasheet is available at the following URL: https://www.adestotech.com/wp-content/uploads/DS-AT25SF321_047.pdf Change-Id: I7410815e063ffe154a97d7ea5881c8eb82025f56 Signed-off-by:
Peter Adkins <pete@kernelpicnic.net> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36904 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
David Hendricks <david.hendricks@gmail.com>
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- Dec 10, 2019
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Nico Huber authored
Don't entagle the code paths for the two NIC classes if it's not necessary. Only compile tested. Change-Id: I59164ccf54afbbd64a0598282d13e80ff7fd6fa4 Signed-off-by:
Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33637 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Dec 06, 2019
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Nico Huber authored
This reverts commit 61e16e54. Obviously throws alignment in the table off and changes output class from `general` to `programmer` for no visible reason. Change-Id: I864044b9fac6af9cf6a89c053eccdcb36f17c7bd Signed-off-by:
Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36909 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-by:
HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by:
David Hendricks <david.hendricks@gmail.com> Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Dec 01, 2019
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Russ Dill authored
The Tin Can Tools Flyswatter and Flyswatter 2 have a FT2232H with a JTAG interface wired to port A. The buffers that drive the JTAG pins need to be enabled with an nOE signal from the FT2232H ADBUS6 and ADBUS7 pins. Flyswatter has an ARM-14 JTAG interface and Flyswatter 2 has an ARM-20 JTAG interface. Change-Id: I56b1fb76dcda32bb02980cd54a2853506bfc9dfd Signed-off-by:
Russ Dill <Russ.Dill@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36896 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Nov 28, 2019
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Edward O'Callaghan authored
This makes writing unit-tests easier. Change-Id: Ia2718f1f40851d3122741cd0e50b0c2b647b727a Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/37264 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Arthur Heymans <arthur@aheymans.xyz>
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Edward O'Callaghan authored
Write a pure function for the table validation logic, it is easier to unit-test. Change-Id: I07b0f95ec0443fa6a8f54eb93f4a7ea1875cccad Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/37239 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Stefan Reinauer <stefan.reinauer@coreboot.org>
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Edward O'Callaghan authored
Write a pure function for the header validation logic, it is easier to unit-test. Change-Id: Ia288bcbc5c371329952a6efba30ccf0e18965a3d Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/37238 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by:
Arthur Heymans <arthur@aheymans.xyz>
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- Nov 17, 2019
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Edward O'Callaghan authored
Change-Id: I72164323d7ff98fc50cb0c47b69741a4f047e098 Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36905 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
David Hendricks <david.hendricks@gmail.com>
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- Nov 15, 2019
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Ryan O'Leary authored
When multiple dediprog programmers are connected, the 'id' parameter allows you to specify which one to use. The id is a string like SF012345 or DP012345. The value is printed on a sticker on the back of the dediprog. This is an improvement over the 'device' parameter which is based on enumeration order and changes when you plug/unplug devices or reboot the machine. To find the id without the sticker, run flashrom with the -V option. This prints the ids as they are enumerated. Alternatively, with dpcmd, you can use the --list-device-id and --fix-device commands to list and write device ids respectively. Note this only supports SF100 at the moment, but SF600 support is possible with more work. Change-Id: I4281213ab02131feb5d47bf66118a001cec0d219 Signed-off-by:
Ryan O'Leary <ryanoleary@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/34160 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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- Nov 14, 2019
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Evgeny Zinoviev authored
It doesn't like empty initializers. Change-Id: If2988e60401155f87ee3369c77f00ccf9332012c Signed-off-by:
Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36629 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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Edward O'Callaghan authored
Drop dead USE_YANGTZE_HEURISTICS code and add Promontory support. Change-Id: I5aa7370025f5c1af56c6cb96194b6f3007d0ede7 Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36426 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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Edward O'Callaghan authored
Change-Id: I6c722e29b321285bf20fb5ee30c912dcdd83411b Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36425 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de> Reviewed-by:
Arthur Heymans <arthur@aheymans.xyz>
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Edward O'Callaghan authored
V.2: Rename 'find_smbus_dev()' -> 'find_smbus_dev_rev()'. Change-Id: I766b29cc1c7d01aa0bcf6cb9ff5ab73fa1995dcd Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36420 Reviewed-by:
Patrick Georgi <pgeorgi@google.com> Reviewed-by:
Nico Huber <nico.h@gmx.de> Tested-by:
Nico Huber <nico.h@gmx.de>
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Miklós Márton authored
Change-Id: I9477b6f0193bfdf20bbe63421a7fb97b597ec549 Signed-off-by:
Miklós Márton <martonmiklosqdev@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/25683 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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- Nov 13, 2019
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Peichao Wang authored
Port the code from chromeos flashrom BUG=b:144297264 TEST=Tested using W25Q128JWDTR in SPI mode Signed-off-by:
Peichao.Wang <peichao.wang@bitland.corp-partner.google.com> Change-Id: Ifc28878b17dc10da2cfd8f82fffbd57adb22799e Reviewed-on: https://review.coreboot.org/c/flashrom/+/36717 Reviewed-by:
Edward O'Callaghan <quasisec@chromium.org> Tested-by:
build bot (Jenkins) <no-reply@coreboot.org>
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- Nov 11, 2019
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Jacob Creedon authored
This adds missing voltage and capacity variants for N25Q and MT25Q series devices. This also fixes a typo in some model numbers where the last letter should have been a G instead of an E. Added devices include: N25Q256..1E N25Q512..1G N25Q00A..1G N25Q00A..3G MT25QU128 MT25QL128 MT25QU256 MT25QU512 tested by Jacob Creedon <jcreedon@google.com> MT25QL01G tested by Konstantin Grudnev <grudnevkv@gmail.com> MT25QU01G MT25QL02G MT25QU02G Two have been tested as indicated, all other variants added are marked untested. Signed-off-by:
Jacob Creedon <jcreedon@google.com> Change-Id: I85630e4f6c0aa3b261f9871b7d363dad278b997e Reviewed-on: https://review.coreboot.org/c/flashrom/+/34491 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Edward O'Callaghan <quasisec@chromium.org>
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- Nov 06, 2019
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Nico Huber authored
Add `util/getversion.sh` that retrieves version information from a `versioninfo.inc` (what we use for releases) if present or uses `util/getrevision.sh` if not. Let Meson use it for flashrom's version. It seems Meson doesn't generate the manual page at all, so the `--man-date` command is currently unused. Change-Id: I401e5638509c4a573bc0cb17ebc5fa76df9700b5 Signed-off-by:
Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35561 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Mario Limonciello <superm1@gmail.com> Reviewed-by:
Richard Hughes <hughsient@gmail.com> Reviewed-by:
David Hendricks <david.hendricks@gmail.com> Reviewed-by:
Angel Pons <th3fanbus@gmail.com>
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- Oct 22, 2019
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Edward O'Callaghan authored
Change-Id: Ie23612226a48d6732750f51547642da0a6257dd8 Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36219 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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- Oct 17, 2019
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Edward O'Callaghan authored
Introduce cli_classic_single_operation() to consolidate the repeating pattern of multiple CLI operations at once. Also modify cli_classic_abort_usage() to take an optional error abort string and print it to stderr, this allows for trimming a few more lines off the cli implementation. V.2: A few fixes upon review: - Trim off some unnecessary braces for single line branches. - Pass 'operation_specified' by reference. - Rename a function. V.3: Fix print order of cli_classic_abort_usage(). Change-Id: I54598efdaee2b95cb278b0f2aac05f48bbd95bef Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35611 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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Edward O'Callaghan authored
Make the first line of --help in usage to align with the format of the man page, including fixing any missing options. V.2: Add an extra space. Change-Id: I44f82c6a54fddb54bf268fe6eb22e50acb6025cf Signed-off-by:
Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35793 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org>
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- Oct 16, 2019
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Mario Limonciello authored
The typical convention is to not use the `lib` prefix (ie `libfoo`) but instead to just use foo. Change-Id: I5ab46418e2a1708d5c11970f1e56250f2adb7d70 Signed-off-by:
Mario Limonciello <mario.limonciello@dell.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36069 Tested-by:
build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by:
Richard Hughes <richard@hughsie.com> Reviewed-by:
David Hendricks <david.hendricks@gmail.com>
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Mario Limonciello authored
Match strictly the library version, and remove all starting letters. Change-Id: I25587ed2ad7fbcffdf14eb758c1f0d6ab2aea545 Signed-off-by:
Mario Limonciello <mario.limonciello@dell.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/35566 Tested-by:
Nico Huber <nico.h@gmx.de> Reviewed-by:
Richard Hughes <richard@hughsie.com> Reviewed-by:
Nico Huber <nico.h@gmx.de>
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